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author | David Shah <dave@ds0.me> | 2020-10-22 16:02:58 +0100 |
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committer | David Shah <dave@ds0.me> | 2020-11-30 08:45:28 +0000 |
commit | f8dca82a713d2d90d29c70357c5c276bed5d7862 (patch) | |
tree | 31299885e38b431f9a0d83999003742bd96a69bf /nexus/io.cc | |
parent | f749038959b589467ce0605cf60f68f18d7573cd (diff) | |
download | nextpnr-f8dca82a713d2d90d29c70357c5c276bed5d7862.tar.gz nextpnr-f8dca82a713d2d90d29c70357c5c276bed5d7862.tar.bz2 nextpnr-f8dca82a713d2d90d29c70357c5c276bed5d7862.zip |
nexus: Basic support for differential IO types
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'nexus/io.cc')
-rw-r--r-- | nexus/io.cc | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/nexus/io.cc b/nexus/io.cc new file mode 100644 index 00000000..fd5e584f --- /dev/null +++ b/nexus/io.cc @@ -0,0 +1,70 @@ +/* + * nextpnr -- Next Generation Place and Route + * + * Copyright (C) 2020 David Shah <dave@ds0.me> + * + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "log.h" +#include "nextpnr.h" + +NEXTPNR_NAMESPACE_BEGIN + +const std::unordered_map<std::string, IOTypeData> Arch::io_types = { + {"LVCMOS33", {IOSTYLE_SE_WR, 330}}, {"LVCMOS25", {IOSTYLE_SE_WR, 250}}, + {"LVCMOS18", {IOSTYLE_SE_WR, 180}}, {"LVCMOS15", {IOSTYLE_SE_WR, 150}}, + {"LVCMOS12", {IOSTYLE_SE_WR, 120}}, {"LVCMOS10", {IOSTYLE_SE_WR, 120}}, + + {"LVCMOS33D", {IOSTYLE_PD_WR, 330}}, {"LVCMOS25D", {IOSTYLE_PD_WR, 250}}, + + {"LVCMOS18H", {IOSTYLE_SE_HP, 180}}, {"LVCMOS15H", {IOSTYLE_SE_HP, 150}}, + {"LVCMOS12H", {IOSTYLE_SE_HP, 120}}, {"LVCMOS10R", {IOSTYLE_SE_HP, 120}}, + {"LVCMOS10H", {IOSTYLE_SE_HP, 100}}, + + {"HSTL15_I", {IOSTYLE_REF_HP, 150}}, {"SSTL15_I", {IOSTYLE_REF_HP, 150}}, + {"SSTL15_II", {IOSTYLE_REF_HP, 150}}, {"SSTL135_I", {IOSTYLE_REF_HP, 135}}, + {"SSTL135_II", {IOSTYLE_REF_HP, 135}}, {"HSUL12", {IOSTYLE_REF_HP, 120}}, + + {"LVDS", {IOSTYLE_DIFF_HP, 180}}, {"SLVS", {IOSTYLE_DIFF_HP, 120}}, + {"MIPI_DPHY", {IOSTYLE_DIFF_HP, 120}}, {"HSUL12D", {IOSTYLE_DIFF_HP, 120}}, + + {"HSTL15D_I", {IOSTYLE_DIFF_HP, 150}}, {"SSTL15D_I", {IOSTYLE_DIFF_HP, 150}}, + {"SSTL15D_II", {IOSTYLE_DIFF_HP, 150}}, {"SSTL135D_I", {IOSTYLE_DIFF_HP, 135}}, + {"SSTL135D_II", {IOSTYLE_DIFF_HP, 135}}, {"HSUL12D", {IOSTYLE_DIFF_HP, 120}}, +}; + +int Arch::get_io_type_vcc(const std::string &io_type) const +{ + if (!io_types.count(io_type)) + log_error("IO type '%s' not supported.\n", io_type.c_str()); + return io_types.at(io_type).vcco; +} + +bool Arch::is_io_type_diff(const std::string &io_type) const +{ + if (!io_types.count(io_type)) + log_error("IO type '%s' not supported.\n", io_type.c_str()); + return io_types.at(io_type).style & IOMODE_DIFF; +} + +bool Arch::is_io_type_ref(const std::string &io_type) const +{ + if (!io_types.count(io_type)) + log_error("IO type '%s' not supported.\n", io_type.c_str()); + return io_types.at(io_type).style & IOMODE_REF; +} + +NEXTPNR_NAMESPACE_END |