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| author | David Shah <dave@ds0.me> | 2020-10-22 15:11:12 +0100 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2020-11-30 08:45:27 +0000 |
| commit | e8e6316f887afa58c3d1476592ba0831353379a0 (patch) | |
| tree | 03d1290c17457cc678b373b7b73497197df4183b /nexus | |
| parent | 27ecaf3e88730f2e295345342cec864801dbd851 (diff) | |
| download | nextpnr-e8e6316f887afa58c3d1476592ba0831353379a0.tar.gz nextpnr-e8e6316f887afa58c3d1476592ba0831353379a0.tar.bz2 nextpnr-e8e6316f887afa58c3d1476592ba0831353379a0.zip | |
nexus: EBR fixes
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'nexus')
| -rw-r--r-- | nexus/arch.h | 1 | ||||
| -rw-r--r-- | nexus/constids.inc | 2 | ||||
| -rw-r--r-- | nexus/fasm.cc | 9 | ||||
| -rw-r--r-- | nexus/pack.cc | 2 | ||||
| -rw-r--r-- | nexus/pins.cc | 15 |
5 files changed, 17 insertions, 12 deletions
diff --git a/nexus/arch.h b/nexus/arch.h index 60b4b166..5924732b 100644 --- a/nexus/arch.h +++ b/nexus/arch.h @@ -796,6 +796,7 @@ enum CellPinStyle PINSTYLE_PU = 0x4022, // signals that float high and default high PINSTYLE_T = 0x4027, // PIO 'T' signal + PINSTYLE_ADLSB = 0x4017, // special case of the EBR address MSBs PINSTYLE_INV_PD = 0x0017, // invertible, pull down by default PINSTYLE_INV_PU = 0x4027, // invertible, pull up by default diff --git a/nexus/constids.inc b/nexus/constids.inc index d571e9bb..0c01b577 100644 --- a/nexus/constids.inc +++ b/nexus/constids.inc @@ -203,3 +203,5 @@ X(CLKR) X(CEW) X(CER) X(RST) + +X(WEAMUX) diff --git a/nexus/fasm.cc b/nexus/fasm.cc index 60ff1aca..fdab3bca 100644 --- a/nexus/fasm.cc +++ b/nexus/fasm.cc @@ -388,6 +388,7 @@ struct NexusFasmWriter std::string mode = str_or_default(cell->params, id_MODE, ""); write_bit(stringf("MODE.%s_MODE", mode.c_str())); + write_enum(cell, "INIT_DATA", "STATIC"); write_enum(cell, "GSR", "DISABLED"); write_int_vector("WID[10:0]", wid, 11); @@ -395,8 +396,8 @@ struct NexusFasmWriter push(stringf("%s_MODE", mode.c_str())); if (mode == "DP16K") { - write_int_vector_param(cell, "CSDECODE_A", 7, 3); - write_int_vector_param(cell, "CSDECODE_B", 7, 3); + write_int_vector_param(cell, "CSDECODE_A", 7, 3, true); + write_int_vector_param(cell, "CSDECODE_B", 7, 3, true); write_enum(cell, "ASYNC_RST_RELEASE_A"); write_enum(cell, "ASYNC_RST_RELEASE_B"); write_enum(cell, "DATA_WIDTH_A"); @@ -406,8 +407,8 @@ struct NexusFasmWriter write_enum(cell, "RESETMODE_A"); write_enum(cell, "RESETMODE_B"); } else if (mode == "PDP16K" || mode == "PDPSC16K") { - write_int_vector_param(cell, "CSDECODE_W", 7, 3); - write_int_vector_param(cell, "CSDECODE_R", 7, 3); + write_int_vector_param(cell, "CSDECODE_W", 7, 3, true); + write_int_vector_param(cell, "CSDECODE_R", 7, 3, true); write_enum(cell, "ASYNC_RST_RELEASE"); write_enum(cell, "DATA_WIDTH_W"); write_enum(cell, "DATA_WIDTH_R"); diff --git a/nexus/pack.cc b/nexus/pack.cc index 2cef0687..abe963ba 100644 --- a/nexus/pack.cc +++ b/nexus/pack.cc @@ -1023,6 +1023,7 @@ struct NexusPacker // Pseudo dual port bram_rules[id_PDP16K_MODE].new_type = id_OXIDE_EBR; bram_rules[id_PDP16K_MODE].set_params.emplace_back(id_MODE, std::string("PDP16K")); + bram_rules[id_PDP16K_MODE].set_params.emplace_back(id_WEAMUX, std::string("1")); bram_rules[id_PDP16K_MODE].parse_params.emplace_back(id_CSDECODE_R, id_CSDECODE_R, 3, 7); bram_rules[id_PDP16K_MODE].parse_params.emplace_back(id_CSDECODE_W, id_CSDECODE_W, 3, 7); bram_rules[id_PDP16K_MODE].port_xform[id_CLKW] = id_CLKA; @@ -1043,6 +1044,7 @@ struct NexusPacker bram_rules[id_PDPSC16K_MODE] = bram_rules[id_PDP16K_MODE]; bram_rules[id_PDPSC16K_MODE].set_params.clear(); bram_rules[id_PDPSC16K_MODE].set_params.emplace_back(id_MODE, std::string("PDPSC16K")); + bram_rules[id_PDPSC16K_MODE].set_params.emplace_back(id_WEAMUX, std::string("1")); bram_rules[id_PDPSC16K_MODE].port_multixform[id_CLK] = {id_CLKA, id_CLKB}; log_info("Packing BRAM...\n"); diff --git a/nexus/pins.cc b/nexus/pins.cc index 1fa62b28..de92f2b6 100644 --- a/nexus/pins.cc +++ b/nexus/pins.cc @@ -64,14 +64,13 @@ static const std::unordered_map<IdString, Arch::CellPinsData> base_cell_pin_data {id_B, PINSTYLE_DEDI}, {{}, PINSTYLE_PU}, }}, - {id_OXIDE_EBR, {{id_CLKA, PINSTYLE_CLK}, {id_CLKB, PINSTYLE_CLK}, {id_CEA, PINSTYLE_CE}, - {id_CEB, PINSTYLE_CE}, {id_CSA0, PINSTYLE_PU}, {id_CSA1, PINSTYLE_PU}, - {id_CSA2, PINSTYLE_PU}, {id_CSB0, PINSTYLE_PU}, {id_CSB1, PINSTYLE_PU}, - {id_CSB2, PINSTYLE_PU}, {id_ADA0, PINSTYLE_INV_PD}, {id_ADA1, PINSTYLE_INV_PD}, - {id_ADA2, PINSTYLE_INV_PD}, {id_ADA2, PINSTYLE_INV_PD}, {id_ADA3, PINSTYLE_INV_PD}, - {id_ADB0, PINSTYLE_INV_PD}, {id_ADB1, PINSTYLE_INV_PD}, {id_WEA, PINSTYLE_INV_PD}, - {id_WEB, PINSTYLE_INV_PD}, {id_RSTA, PINSTYLE_INV_PD}, {id_RSTB, PINSTYLE_INV_PD}, - {{}, PINSTYLE_CIB}}}, + {id_OXIDE_EBR, + {{id_CLKA, PINSTYLE_CLK}, {id_CLKB, PINSTYLE_CLK}, {id_CEA, PINSTYLE_CE}, {id_CEB, PINSTYLE_CE}, + {id_CSA0, PINSTYLE_PU}, {id_CSA1, PINSTYLE_PU}, {id_CSA2, PINSTYLE_PU}, {id_CSB0, PINSTYLE_PU}, + {id_CSB1, PINSTYLE_PU}, {id_CSB2, PINSTYLE_PU}, {id_ADA0, PINSTYLE_ADLSB}, {id_ADA1, PINSTYLE_ADLSB}, + {id_ADA2, PINSTYLE_ADLSB}, {id_ADA2, PINSTYLE_ADLSB}, {id_ADA3, PINSTYLE_ADLSB}, {id_ADB0, PINSTYLE_ADLSB}, + {id_ADB1, PINSTYLE_ADLSB}, {id_WEA, PINSTYLE_INV_PD}, {id_WEB, PINSTYLE_INV_PD}, {id_RSTA, PINSTYLE_INV_PD}, + {id_RSTB, PINSTYLE_INV_PD}, {{}, PINSTYLE_CIB}}}, {id_OSC_CORE, { {id_HFOUTEN, PINSTYLE_PU}, |