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-rw-r--r--ice40/chip.cc212
-rw-r--r--ice40/chip.h111
-rw-r--r--ice40/main.cc2
-rw-r--r--ice40/portpins.inc105
-rw-r--r--ice40/pybindings.cc14
5 files changed, 126 insertions, 318 deletions
diff --git a/ice40/chip.cc b/ice40/chip.cc
index 4ba7697d..ed79be0b 100644
--- a/ice40/chip.cc
+++ b/ice40/chip.cc
@@ -51,111 +51,7 @@ IdString PortPinToId(PortPin type)
if (type == PIN_##t) \
return #t;
- X(IN_0)
- X(IN_1)
- X(IN_2)
- X(IN_3)
- X(O)
- X(LO)
- X(CIN)
- X(COUT)
- X(CEN)
- X(CLK)
- X(SR)
-
- X(MASK_0)
- X(MASK_1)
- X(MASK_2)
- X(MASK_3)
- X(MASK_4)
- X(MASK_5)
- X(MASK_6)
- X(MASK_7)
- X(MASK_8)
- X(MASK_9)
- X(MASK_10)
- X(MASK_11)
- X(MASK_12)
- X(MASK_13)
- X(MASK_14)
- X(MASK_15)
-
- X(RDATA_0)
- X(RDATA_1)
- X(RDATA_2)
- X(RDATA_3)
- X(RDATA_4)
- X(RDATA_5)
- X(RDATA_6)
- X(RDATA_7)
- X(RDATA_8)
- X(RDATA_9)
- X(RDATA_10)
- X(RDATA_11)
- X(RDATA_12)
- X(RDATA_13)
- X(RDATA_14)
- X(RDATA_15)
-
- X(WDATA_0)
- X(WDATA_1)
- X(WDATA_2)
- X(WDATA_3)
- X(WDATA_4)
- X(WDATA_5)
- X(WDATA_6)
- X(WDATA_7)
- X(WDATA_8)
- X(WDATA_9)
- X(WDATA_10)
- X(WDATA_11)
- X(WDATA_12)
- X(WDATA_13)
- X(WDATA_14)
- X(WDATA_15)
-
- X(WADDR_0)
- X(WADDR_1)
- X(WADDR_2)
- X(WADDR_3)
- X(WADDR_4)
- X(WADDR_5)
- X(WADDR_6)
- X(WADDR_7)
- X(WADDR_8)
- X(WADDR_9)
- X(WADDR_10)
-
- X(RADDR_0)
- X(RADDR_1)
- X(RADDR_2)
- X(RADDR_3)
- X(RADDR_4)
- X(RADDR_5)
- X(RADDR_6)
- X(RADDR_7)
- X(RADDR_8)
- X(RADDR_9)
- X(RADDR_10)
-
- X(WCLK)
- X(WCLKE)
- X(WE)
-
- X(RCLK)
- X(RCLKE)
- X(RE)
-
- X(PACKAGE_PIN)
- X(LATCH_INPUT_VALUE)
- X(CLOCK_ENABLE)
- X(INPUT_CLK)
- X(OUTPUT_CLK)
- X(OUTPUT_ENABLE)
- X(D_OUT_0)
- X(D_OUT_1)
- X(D_IN_0)
- X(D_IN_1)
+#include "portpins.inc"
#undef X
return IdString();
@@ -167,111 +63,7 @@ PortPin PortPinFromId(IdString id)
if (id == #t) \
return PIN_##t;
- X(IN_0)
- X(IN_1)
- X(IN_2)
- X(IN_3)
- X(O)
- X(LO)
- X(CIN)
- X(COUT)
- X(CEN)
- X(CLK)
- X(SR)
-
- X(MASK_0)
- X(MASK_1)
- X(MASK_2)
- X(MASK_3)
- X(MASK_4)
- X(MASK_5)
- X(MASK_6)
- X(MASK_7)
- X(MASK_8)
- X(MASK_9)
- X(MASK_10)
- X(MASK_11)
- X(MASK_12)
- X(MASK_13)
- X(MASK_14)
- X(MASK_15)
-
- X(RDATA_0)
- X(RDATA_1)
- X(RDATA_2)
- X(RDATA_3)
- X(RDATA_4)
- X(RDATA_5)
- X(RDATA_6)
- X(RDATA_7)
- X(RDATA_8)
- X(RDATA_9)
- X(RDATA_10)
- X(RDATA_11)
- X(RDATA_12)
- X(RDATA_13)
- X(RDATA_14)
- X(RDATA_15)
-
- X(WDATA_0)
- X(WDATA_1)
- X(WDATA_2)
- X(WDATA_3)
- X(WDATA_4)
- X(WDATA_5)
- X(WDATA_6)
- X(WDATA_7)
- X(WDATA_8)
- X(WDATA_9)
- X(WDATA_10)
- X(WDATA_11)
- X(WDATA_12)
- X(WDATA_13)
- X(WDATA_14)
- X(WDATA_15)
-
- X(WADDR_0)
- X(WADDR_1)
- X(WADDR_2)
- X(WADDR_3)
- X(WADDR_4)
- X(WADDR_5)
- X(WADDR_6)
- X(WADDR_7)
- X(WADDR_8)
- X(WADDR_9)
- X(WADDR_10)
-
- X(RADDR_0)
- X(RADDR_1)
- X(RADDR_2)
- X(RADDR_3)
- X(RADDR_4)
- X(RADDR_5)
- X(RADDR_6)
- X(RADDR_7)
- X(RADDR_8)
- X(RADDR_9)
- X(RADDR_10)
-
- X(WCLK)
- X(WCLKE)
- X(WE)
-
- X(RCLK)
- X(RCLKE)
- X(RE)
-
- X(PACKAGE_PIN)
- X(LATCH_INPUT_VALUE)
- X(CLOCK_ENABLE)
- X(INPUT_CLK)
- X(OUTPUT_CLK)
- X(OUTPUT_ENABLE)
- X(D_OUT_0)
- X(D_OUT_1)
- X(D_IN_0)
- X(D_IN_1)
+#include "portpins.inc"
#undef X
return PIN_NIL;
diff --git a/ice40/chip.h b/ice40/chip.h
index 695eea48..d107b6aa 100644
--- a/ice40/chip.h
+++ b/ice40/chip.h
@@ -46,112 +46,9 @@ BelType belTypeFromId(IdString id);
enum PortPin
{
PIN_NIL,
-
- PIN_IN_0,
- PIN_IN_1,
- PIN_IN_2,
- PIN_IN_3,
- PIN_O,
- PIN_LO,
- PIN_CIN,
- PIN_COUT,
- PIN_CEN,
- PIN_CLK,
- PIN_SR,
-
- PIN_MASK_0,
- PIN_MASK_1,
- PIN_MASK_2,
- PIN_MASK_3,
- PIN_MASK_4,
- PIN_MASK_5,
- PIN_MASK_6,
- PIN_MASK_7,
- PIN_MASK_8,
- PIN_MASK_9,
- PIN_MASK_10,
- PIN_MASK_11,
- PIN_MASK_12,
- PIN_MASK_13,
- PIN_MASK_14,
- PIN_MASK_15,
-
- PIN_RDATA_0,
- PIN_RDATA_1,
- PIN_RDATA_2,
- PIN_RDATA_3,
- PIN_RDATA_4,
- PIN_RDATA_5,
- PIN_RDATA_6,
- PIN_RDATA_7,
- PIN_RDATA_8,
- PIN_RDATA_9,
- PIN_RDATA_10,
- PIN_RDATA_11,
- PIN_RDATA_12,
- PIN_RDATA_13,
- PIN_RDATA_14,
- PIN_RDATA_15,
-
- PIN_WDATA_0,
- PIN_WDATA_1,
- PIN_WDATA_2,
- PIN_WDATA_3,
- PIN_WDATA_4,
- PIN_WDATA_5,
- PIN_WDATA_6,
- PIN_WDATA_7,
- PIN_WDATA_8,
- PIN_WDATA_9,
- PIN_WDATA_10,
- PIN_WDATA_11,
- PIN_WDATA_12,
- PIN_WDATA_13,
- PIN_WDATA_14,
- PIN_WDATA_15,
-
- PIN_WADDR_0,
- PIN_WADDR_1,
- PIN_WADDR_2,
- PIN_WADDR_3,
- PIN_WADDR_4,
- PIN_WADDR_5,
- PIN_WADDR_6,
- PIN_WADDR_7,
- PIN_WADDR_8,
- PIN_WADDR_9,
- PIN_WADDR_10,
-
- PIN_RADDR_0,
- PIN_RADDR_1,
- PIN_RADDR_2,
- PIN_RADDR_3,
- PIN_RADDR_4,
- PIN_RADDR_5,
- PIN_RADDR_6,
- PIN_RADDR_7,
- PIN_RADDR_8,
- PIN_RADDR_9,
- PIN_RADDR_10,
-
- PIN_WCLK,
- PIN_WCLKE,
- PIN_WE,
-
- PIN_RCLK,
- PIN_RCLKE,
- PIN_RE,
-
- PIN_PACKAGE_PIN,
- PIN_LATCH_INPUT_VALUE,
- PIN_CLOCK_ENABLE,
- PIN_INPUT_CLK,
- PIN_OUTPUT_CLK,
- PIN_OUTPUT_ENABLE,
- PIN_D_OUT_0,
- PIN_D_OUT_1,
- PIN_D_IN_0,
- PIN_D_IN_1
+#define X(t) PIN_##t,
+#include "portpins.inc"
+#undef X
};
IdString PortPinToId(PortPin type);
@@ -268,7 +165,7 @@ template <> struct hash<PipId>
return wire.index;
}
};
-}
+} // namespace std
// -----------------------------------------------------------------------
diff --git a/ice40/main.cc b/ice40/main.cc
index c42b869a..d0becdd6 100644
--- a/ice40/main.cc
+++ b/ice40/main.cc
@@ -22,10 +22,10 @@
#include <iostream>
#include "design.h"
#include "jsonparse.h"
+#include "log.h"
#include "mainwindow.h"
#include "pybindings.h"
#include "version.h"
-#include "log.h"
void svg_dump_el(const GraphicElement &el)
{
diff --git a/ice40/portpins.inc b/ice40/portpins.inc
new file mode 100644
index 00000000..9eda4bbd
--- /dev/null
+++ b/ice40/portpins.inc
@@ -0,0 +1,105 @@
+X(IN_0)
+X(IN_1)
+X(IN_2)
+X(IN_3)
+X(O)
+X(LO)
+X(CIN)
+X(COUT)
+X(CEN)
+X(CLK)
+X(SR)
+
+X(MASK_0)
+X(MASK_1)
+X(MASK_2)
+X(MASK_3)
+X(MASK_4)
+X(MASK_5)
+X(MASK_6)
+X(MASK_7)
+X(MASK_8)
+X(MASK_9)
+X(MASK_10)
+X(MASK_11)
+X(MASK_12)
+X(MASK_13)
+X(MASK_14)
+X(MASK_15)
+
+X(RDATA_0)
+X(RDATA_1)
+X(RDATA_2)
+X(RDATA_3)
+X(RDATA_4)
+X(RDATA_5)
+X(RDATA_6)
+X(RDATA_7)
+X(RDATA_8)
+X(RDATA_9)
+X(RDATA_10)
+X(RDATA_11)
+X(RDATA_12)
+X(RDATA_13)
+X(RDATA_14)
+X(RDATA_15)
+
+X(WDATA_0)
+X(WDATA_1)
+X(WDATA_2)
+X(WDATA_3)
+X(WDATA_4)
+X(WDATA_5)
+X(WDATA_6)
+X(WDATA_7)
+X(WDATA_8)
+X(WDATA_9)
+X(WDATA_10)
+X(WDATA_11)
+X(WDATA_12)
+X(WDATA_13)
+X(WDATA_14)
+X(WDATA_15)
+
+X(WADDR_0)
+X(WADDR_1)
+X(WADDR_2)
+X(WADDR_3)
+X(WADDR_4)
+X(WADDR_5)
+X(WADDR_6)
+X(WADDR_7)
+X(WADDR_8)
+X(WADDR_9)
+X(WADDR_10)
+
+X(RADDR_0)
+X(RADDR_1)
+X(RADDR_2)
+X(RADDR_3)
+X(RADDR_4)
+X(RADDR_5)
+X(RADDR_6)
+X(RADDR_7)
+X(RADDR_8)
+X(RADDR_9)
+X(RADDR_10)
+
+X(WCLK)
+X(WCLKE)
+X(WE)
+
+X(RCLK)
+X(RCLKE)
+X(RE)
+
+X(PACKAGE_PIN)
+X(LATCH_INPUT_VALUE)
+X(CLOCK_ENABLE)
+X(INPUT_CLK)
+X(OUTPUT_CLK)
+X(OUTPUT_ENABLE)
+X(D_OUT_0)
+X(D_OUT_1)
+X(D_IN_0)
+X(D_IN_1)
diff --git a/ice40/pybindings.cc b/ice40/pybindings.cc
index daf0be84..fb5d7763 100644
--- a/ice40/pybindings.cc
+++ b/ice40/pybindings.cc
@@ -46,6 +46,20 @@ void arch_wrap_python()
.def_readwrite("index", &WireId::index)
.def("nil", &WireId::nil);
+ class_<PipId>("PipId")
+ .def_readwrite("index", &PipId::index)
+ .def("nil", &WireId::nil);
+
+ class_<BelPin>("BelPin")
+ .def_readwrite("bel", &BelPin::bel)
+ .def_readwrite("pin", &BelPin::pin);
+
+ enum_<PortPin>("PortPin")
+#define X(t) .value("PIN_" #t, PIN_##t)
+#include "portpins.inc"
+ ;
+#undef X
+
class_<Chip>("Chip", init<ChipArgs>())
.def("getBelByName", &Chip::getBelByName)
.def("getWireByName", &Chip::getWireByName)
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-17 21:25:25 +0000