diff options
| -rw-r--r-- | .gitmodules | 3 | ||||
| m--------- | 3rdparty/abseil-cpp | 0 | ||||
| -rw-r--r-- | CMakeLists.txt | 5 | ||||
| -rw-r--r-- | common/router2.cc | 3 |
4 files changed, 10 insertions, 1 deletions
diff --git a/.gitmodules b/.gitmodules index a22fbc41..c0c178bf 100644 --- a/.gitmodules +++ b/.gitmodules @@ -4,3 +4,6 @@ [submodule "fpga-interchange-schema"] path = 3rdparty/fpga-interchange-schema url = https://github.com/SymbiFlow/fpga-interchange-schema.git +[submodule "3rdparty/abseil-cpp"] + path = 3rdparty/abseil-cpp + url = https://github.com/abseil/abseil-cpp.git diff --git a/3rdparty/abseil-cpp b/3rdparty/abseil-cpp new file mode 160000 +Subproject a76698790753d2ec71f655cdc84d61bcb27780d diff --git a/CMakeLists.txt b/CMakeLists.txt index 5c0537ff..2c8e38a8 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -171,6 +171,8 @@ if (NOT DEFINED CURRENT_GIT_VERSION) ) endif() +add_subdirectory(3rdparty/abseil-cpp EXCLUDE_FROM_ALL) + if (BUILD_TESTS) add_subdirectory(3rdparty/googletest/googletest ${CMAKE_CURRENT_BINARY_DIR}/generated/3rdparty/googletest EXCLUDE_FROM_ALL) enable_testing() @@ -272,6 +274,9 @@ foreach (family ${ARCH}) # Include the family-specific CMakeFile include(${family}/family.cmake) foreach (target ${family_targets}) + target_link_libraries(${target} PRIVATE absl::flat_hash_map) + target_link_libraries(${target} PRIVATE absl::flat_hash_set) + # Include family-specific source files to all family targets and set defines appropriately target_include_directories(${target} PRIVATE ${family}/ ${CMAKE_CURRENT_BINARY_DIR}/generated/) target_compile_definitions(${target} PRIVATE NEXTPNR_NAMESPACE=nextpnr_${family} ARCH_${ufamily} ARCHNAME=${family}) diff --git a/common/router2.cc b/common/router2.cc index 35042f14..0a3a4e94 100644 --- a/common/router2.cc +++ b/common/router2.cc @@ -27,6 +27,7 @@ */ #include "router2.h" +#include <absl/container/flat_hash_map.h> #include <algorithm> #include <boost/container/flat_map.hpp> #include <chrono> @@ -190,7 +191,7 @@ struct Router2 } } - std::unordered_map<WireId, int> wire_to_idx; + absl::flat_hash_map<WireId, int> wire_to_idx; std::vector<PerWireData> flat_wires; PerWireData &wire_data(WireId w) { return flat_wires[wire_to_idx.at(w)]; } |