diff options
Diffstat (limited to 'common/place_sa.cc')
| -rw-r--r-- | common/place_sa.cc | 39 |
1 files changed, 23 insertions, 16 deletions
diff --git a/common/place_sa.cc b/common/place_sa.cc index a0c32c1d..25297d31 100644 --- a/common/place_sa.cc +++ b/common/place_sa.cc @@ -135,6 +135,7 @@ struct SAState bool improved = false; int n_move, n_accept; int diameter = 35; + std::unordered_map<BelType, int> bel_types; std::vector<std::vector<std::vector<std::vector<BelId>>>> fast_bels; std::unordered_set<BelId> locked_bels; }; @@ -160,7 +161,6 @@ static float get_wirelength(Chip *chip, NetInfo *net) if (load.cell == nullptr) continue; CellInfo *load_cell = load.cell; - int load_x = 0, load_y = 0; if (load_cell->bel == BelId()) continue; // chip->estimatePosition(load_cell->bel, load_x, load_y); @@ -264,10 +264,8 @@ swap_fail: BelId random_bel_for_cell(Design *design, CellInfo *cell, SAState &state, rnd_state &rnd) { - BelId best_bel = BelId(); Chip &chip = design->chip; BelType targetType = belTypeFromId(cell->type); - assert(int(targetType) < state.fast_bels.size()); int x = 0, y = 0; chip.estimatePosition(cell->bel, x, y); while (true) { @@ -275,11 +273,12 @@ BelId random_bel_for_cell(Design *design, CellInfo *cell, SAState &state, int(x) + state.diameter + 1); int ny = random_int_between(rnd, std::max(int(y) - state.diameter, 0), int(y) + state.diameter + 1); - if (nx >= state.fast_bels.at(int(targetType)).size()) + int beltype_idx = state.bel_types.at(targetType); + if (nx >= int(state.fast_bels.at(beltype_idx).size())) continue; - if (ny >= state.fast_bels.at(int(targetType)).at(nx).size()) + if (ny >= int(state.fast_bels.at(beltype_idx).at(nx).size())) continue; - const auto &fb = state.fast_bels.at(int(targetType)).at(nx).at(ny); + const auto &fb = state.fast_bels.at(beltype_idx).at(nx).at(ny); if (fb.size() == 0) continue; BelId bel = fb.at(random_int_between(rnd, 0, fb.size())); @@ -293,7 +292,7 @@ void place_design_sa(Design *design, int seed) { SAState state; - size_t total_cells = design->cells.size(), placed_cells = 0; + size_t placed_cells = 0; std::queue<CellInfo *> visit_cells; // Initial constraints placer for (auto cell_entry : design->cells) { @@ -343,19 +342,27 @@ void place_design_sa(Design *design, int seed) } // Build up a fast position/type to Bel lookup table int max_x = 0, max_y = 0; + int bel_types = 0; for (auto bel : design->chip.getBels()) { int x, y; design->chip.estimatePosition(bel, x, y); BelType type = design->chip.getBelType(bel); - if (state.fast_bels.size() < int(type) + 1) - state.fast_bels.resize(int(type) + 1); - if (state.fast_bels.at(int(type)).size() < int(x) + 1) - state.fast_bels.at(int(type)).resize(int(x) + 1); - if (state.fast_bels.at(int(type)).at(int(x)).size() < int(y) + 1) - state.fast_bels.at(int(type)).at(int(x)).resize(int(y) + 1); - max_x = std::max(max_x, int(x)); - max_y = std::max(max_y, int(y)); - state.fast_bels.at(int(type)).at(int(x)).at(int((y))).push_back(bel); + int type_idx; + if (state.bel_types.find(type) == state.bel_types.end()) { + type_idx = bel_types++; + state.bel_types[type] = type_idx; + } else { + type_idx = state.bel_types.at(type); + } + if (int(state.fast_bels.size()) < type_idx + 1) + state.fast_bels.resize(type_idx + 1); + if (int(state.fast_bels.at(type_idx).size()) < (x + 1)) + state.fast_bels.at(type_idx).resize(x + 1); + if (int(state.fast_bels.at(type_idx).at(x).size()) < (y + 1)) + state.fast_bels.at(type_idx).at(x).resize(y + 1); + max_x = std::max(max_x, x); + max_y = std::max(max_y, y); + state.fast_bels.at(type_idx).at(x).at(y).push_back(bel); } state.diameter = std::max(max_x, max_y) + 1; // Calculate wirelength after initial placement |