diff options
Diffstat (limited to 'ecp5')
| -rw-r--r-- | ecp5/arch.cc | 253 | ||||
| -rw-r--r-- | ecp5/arch.h | 52 | ||||
| -rw-r--r-- | ecp5/arch_place.cc | 74 | ||||
| -rw-r--r-- | ecp5/arch_pybindings.cc | 7 | ||||
| -rw-r--r-- | ecp5/archdefs.h | 2 | ||||
| -rw-r--r-- | ecp5/baseconfigs.cc | 2630 | ||||
| -rw-r--r-- | ecp5/bitstream.cc | 238 | ||||
| -rw-r--r-- | ecp5/cells.cc | 56 | ||||
| -rw-r--r-- | ecp5/cells.h | 11 | ||||
| -rw-r--r-- | ecp5/constids.inc | 142 | ||||
| -rw-r--r-- | ecp5/docs/primitives.md | 47 | ||||
| -rw-r--r-- | ecp5/family.cmake | 106 | ||||
| -rw-r--r-- | ecp5/globals.cc | 21 | ||||
| -rw-r--r-- | ecp5/lpf.cc | 63 | ||||
| -rw-r--r-- | ecp5/main.cc | 40 | ||||
| -rw-r--r-- | ecp5/pack.cc | 1009 | ||||
| -rwxr-xr-x | ecp5/trellis_import.py | 27 |
17 files changed, 4673 insertions, 105 deletions
diff --git a/ecp5/arch.cc b/ecp5/arch.cc index 719426ab..9da8abdf 100644 --- a/ecp5/arch.cc +++ b/ecp5/arch.cc @@ -19,6 +19,7 @@ */ #include <algorithm> +#include <boost/iostreams/device/mapped_file.hpp> #include <boost/range/adaptor/reversed.hpp> #include <cmath> #include <cstring> @@ -27,6 +28,7 @@ #include "log.h" #include "nextpnr.h" #include "placer1.h" +#include "placer_heap.h" #include "router1.h" #include "timing.h" #include "util.h" @@ -63,11 +65,37 @@ static const ChipInfoPOD *get_chip_info(const RelPtr<ChipInfoPOD> *ptr) { return void load_chipdb(); #endif +#if defined(EXTERNAL_CHIPDB_ROOT) +const char *chipdb_blob_25k = nullptr; +const char *chipdb_blob_45k = nullptr; +const char *chipdb_blob_85k = nullptr; + +boost::iostreams::mapped_file_source blob_files[3]; + +const char *mmap_file(int index, const char *filename) +{ + try { + blob_files[index].open(filename); + if (!blob_files[index].is_open()) + log_error("Unable to read chipdb %s\n", filename); + return (const char *)blob_files[index].data(); + } catch (...) { + log_error("Unable to read chipdb %s\n", filename); + } +} + +void load_chipdb() +{ + chipdb_blob_25k = mmap_file(0, EXTERNAL_CHIPDB_ROOT "/ecp5/chipdb-25k.bin"); + chipdb_blob_45k = mmap_file(1, EXTERNAL_CHIPDB_ROOT "/ecp5/chipdb-45k.bin"); + chipdb_blob_85k = mmap_file(2, EXTERNAL_CHIPDB_ROOT "/ecp5/chipdb-85k.bin"); +} +#endif //#define LFE5U_45F_ONLY Arch::Arch(ArchArgs args) : args(args) { -#if defined(_MSC_VER) +#if defined(_MSC_VER) || defined(EXTERNAL_CHIPDB_ROOT) load_chipdb(); #endif #ifdef LFE5U_45F_ONLY @@ -400,23 +428,104 @@ BelId Arch::getBelByLocation(Loc loc) const delay_t Arch::estimateDelay(WireId src, WireId dst) const { - return (240 - 20 * args.speed) * (abs(src.location.x - dst.location.x) + abs(src.location.y - dst.location.y)); + WireId cursor = dst; + + int num_uh = locInfo(dst)->wire_data[dst.index].num_uphill; + if (num_uh < 6) { + for (auto uh : getPipsUphill(dst)) { + if (getPipSrcWire(uh) == src) + return getPipDelay(uh).maxDelay(); + } + } + + auto est_location = [&](WireId w) -> std::pair<int, int> { + const auto &wire = locInfo(w)->wire_data[w.index]; + if (wire.num_bel_pins > 0) { + return std::make_pair(w.location.x + wire.bel_pins[0].rel_bel_loc.x, + w.location.y + wire.bel_pins[0].rel_bel_loc.y); + } else if (wire.num_downhill > 0) { + return std::make_pair(w.location.x + wire.pips_downhill[0].rel_loc.x, + w.location.y + wire.pips_downhill[0].rel_loc.y); + } else if (wire.num_uphill > 0) { + return std::make_pair(w.location.x + wire.pips_uphill[0].rel_loc.x, + w.location.y + wire.pips_uphill[0].rel_loc.y); + } else { + return std::make_pair(int(w.location.x), int(w.location.y)); + } + }; + + auto src_loc = est_location(src), dst_loc = est_location(dst); + + int dx = abs(src_loc.first - dst_loc.first), dy = abs(src_loc.second - dst_loc.second); + + return (130 - 25 * args.speed) * + (6 + std::max(dx - 5, 0) + std::max(dy - 5, 0) + 2 * (std::min(dx, 5) + std::min(dy, 5))); } delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const { const auto &driver = net_info->driver; + if ((driver.port == id_FCO && sink.port == id_FCI) || sink.port == id_FXA || sink.port == id_FXB) + return 0; auto driver_loc = getBelLocation(driver.cell->bel); auto sink_loc = getBelLocation(sink.cell->bel); + // Encourage use of direct interconnect + if (driver_loc.x == sink_loc.x && driver_loc.y == sink_loc.y) { + if ((sink.port == id_A0 || sink.port == id_A1) && (driver.port == id_F1) && + (driver_loc.z == 2 || driver_loc.z == 3)) + return 0; + if ((sink.port == id_B0 || sink.port == id_B1) && (driver.port == id_F1) && + (driver_loc.z == 0 || driver_loc.z == 1)) + return 0; + if ((sink.port == id_C0 || sink.port == id_C1) && (driver.port == id_F0) && + (driver_loc.z == 2 || driver_loc.z == 3)) + return 0; + if ((sink.port == id_D0 || sink.port == id_D1) && (driver.port == id_F0) && + (driver_loc.z == 0 || driver_loc.z == 1)) + return 0; + } + + int dx = abs(driver_loc.x - sink_loc.x), dy = abs(driver_loc.y - sink_loc.y); - return (240 - 20 * args.speed) * (abs(driver_loc.x - sink_loc.x) + abs(driver_loc.y - sink_loc.y)); + return (130 - 25 * args.speed) * + (6 + std::max(dx - 5, 0) + std::max(dy - 5, 0) + 2 * (std::min(dx, 5) + std::min(dy, 5))); } -bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const { return false; } +bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const +{ + if (net_info->driver.port == id_FCO && sink.port == id_FCI) { + budget = 0; + return true; + } else if (sink.port == id_FXA || sink.port == id_FXB) { + budget = 0; + return true; + } else { + return false; + } +} // ----------------------------------------------------------------------- -bool Arch::place() { return placer1(getCtx(), Placer1Cfg(getCtx())); } +bool Arch::place() +{ + std::string placer = str_or_default(settings, id("placer"), defaultPlacer); + + if (placer == "heap") { + PlacerHeapCfg cfg(getCtx()); + cfg.criticalityExponent = 7; + cfg.ioBufTypes.insert(id_TRELLIS_IO); + if (!placer_heap(getCtx(), cfg)) + return false; + } else if (placer == "sa") { + if (!placer1(getCtx(), Placer1Cfg(getCtx()))) + return false; + } else { + log_error("ECP5 architecture does not support placer '%s'\n", placer.c_str()); + } + + permute_luts(); + return true; +} bool Arch::route() { @@ -511,6 +620,11 @@ DecalXY Arch::getGroupDecal(GroupId pip) const { return {}; }; bool Arch::getDelayFromTimingDatabase(IdString tctype, IdString from, IdString to, DelayInfo &delay) const { + auto fnd_dk = celldelay_cache.find({tctype, from, to}); + if (fnd_dk != celldelay_cache.end()) { + delay = fnd_dk->second.second; + return fnd_dk->second.first; + } for (int i = 0; i < speed_grade->num_cell_timings; i++) { const auto &tc = speed_grade->cell_timings[i]; if (tc.cell_type == tctype.index) { @@ -519,9 +633,11 @@ bool Arch::getDelayFromTimingDatabase(IdString tctype, IdString from, IdString t if (dly.from_port == from.index && dly.to_port == to.index) { delay.max_delay = dly.max_delay; delay.min_delay = dly.min_delay; + celldelay_cache[{tctype, from, to}] = std::make_pair(true, delay); return true; } } + celldelay_cache[{tctype, from, to}] = std::make_pair(false, DelayInfo()); return false; } } @@ -551,10 +667,9 @@ void Arch::getSetupHoldFromTimingDatabase(IdString tctype, IdString clock, IdStr bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const { - // Data for -8 grade if (cell->type == id_TRELLIS_SLICE) { - bool has_carry = str_or_default(cell->params, id("MODE"), "LOGIC") == "CCU2"; + bool has_carry = cell->sliceInfo.is_carry; if (fromPort == id_A0 || fromPort == id_B0 || fromPort == id_C0 || fromPort == id_D0 || fromPort == id_A1 || fromPort == id_B1 || fromPort == id_C1 || fromPort == id_D1 || fromPort == id_M0 || fromPort == id_M1 || fromPort == id_FXA || fromPort == id_FXB || fromPort == id_FCI) { @@ -579,6 +694,8 @@ bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort return false; } else if (cell->type == id_DP16KD) { return false; + } else if (cell->type == id_IOLOGIC || cell->type == id_SIOLOGIC) { + return false; } else { return false; } @@ -589,7 +706,7 @@ TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, in auto disconnected = [cell](IdString p) { return !cell->ports.count(p) || cell->ports.at(p).net == nullptr; }; clockInfoCount = 0; if (cell->type == id_TRELLIS_SLICE) { - int sd0 = int_or_default(cell->params, id("REG0_SD"), 0), sd1 = int_or_default(cell->params, id("REG1_SD"), 0); + int sd0 = cell->sliceInfo.sd0, sd1 = cell->sliceInfo.sd1; if (port == id_CLK || port == id_WCK) return TMG_CLOCK_INPUT; if (port == id_A0 || port == id_A1 || port == id_B0 || port == id_B1 || port == id_C0 || port == id_C1 || @@ -669,6 +786,56 @@ TimingPortClass Arch::getPortTimingClass(const CellInfo *cell, IdString port, in return (cell->ports.at(port).type == PORT_OUT) ? TMG_REGISTER_OUTPUT : TMG_REGISTER_INPUT; } return TMG_IGNORE; + } else if (cell->type == id_IOLOGIC || cell->type == id_SIOLOGIC) { + if (port == id_CLK || port == id_ECLK) { + return TMG_CLOCK_INPUT; + } else if (port == id_IOLDO || port == id_IOLDOI || port == id_IOLDOD || port == id_IOLTO || port == id_PADDI || + port == id_DQSR90 || port == id_DQSW || port == id_DQSW270) { + return TMG_IGNORE; + } else { + clockInfoCount = 1; + return (cell->ports.at(port).type == PORT_OUT) ? TMG_REGISTER_OUTPUT : TMG_REGISTER_INPUT; + } + } else if (cell->type == id_DTR || cell->type == id_USRMCLK || cell->type == id_SEDGA || cell->type == id_GSR || + cell->type == id_JTAGG) { + return (cell->ports.at(port).type == PORT_OUT) ? TMG_STARTPOINT : TMG_ENDPOINT; + } else if (cell->type == id_OSCG) { + if (port == id_OSC) + return TMG_GEN_CLOCK; + else + return TMG_IGNORE; + } else if (cell->type == id_CLKDIVF) { + if (port == id_CLKI) + return TMG_CLOCK_INPUT; + else if (port == id_RST || port == id_ALIGNWD) + return TMG_ENDPOINT; + else if (port == id_CDIVX) + return TMG_GEN_CLOCK; + else + NPNR_ASSERT_FALSE("bad clkdiv port"); + } else if (cell->type == id_DQSBUFM) { + if (port == id_READ0 || port == id_READ1) { + clockInfoCount = 1; + return TMG_REGISTER_INPUT; + } else if (port == id_DATAVALID) { + clockInfoCount = 1; + return TMG_REGISTER_OUTPUT; + } else if (port == id_SCLK || port == id_ECLK || port == id_DQSI) { + return TMG_CLOCK_INPUT; + } else if (port == id_DQSR90 || port == id_DQSW || port == id_DQSW270) { + return TMG_GEN_CLOCK; + } + return (cell->ports.at(port).type == PORT_OUT) ? TMG_STARTPOINT : TMG_ENDPOINT; + } else if (cell->type == id_DDRDLL) { + if (port == id_CLK) + return TMG_CLOCK_INPUT; + return (cell->ports.at(port).type == PORT_OUT) ? TMG_STARTPOINT : TMG_ENDPOINT; + } else if (cell->type == id_TRELLIS_ECLKBUF) { + return (cell->ports.at(port).type == PORT_OUT) ? TMG_COMB_OUTPUT : TMG_COMB_INPUT; + } else if (cell->type == id_ECLKSYNCB) { + if (cell->ports.at(port).name == id_STOP) + return TMG_ENDPOINT; + return (cell->ports.at(port).type == PORT_OUT) ? TMG_COMB_OUTPUT : TMG_COMB_INPUT; } else { log_error("cell type '%s' is unsupported (instantiated as '%s')\n", cell->type.c_str(this), cell->name.c_str(this)); @@ -682,8 +849,7 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port info.hold = getDelayFromNS(0); info.clockToQ = getDelayFromNS(0); if (cell->type == id_TRELLIS_SLICE) { - int sd0 = int_or_default(cell->params, id("REG0_SD"), 0), sd1 = int_or_default(cell->params, id("REG1_SD"), 0); - + int sd0 = cell->sliceInfo.sd0, sd1 = cell->sliceInfo.sd1; if (port == id_WD0 || port == id_WD1 || port == id_WAD0 || port == id_WAD1 || port == id_WAD2 || port == id_WAD3 || port == id_WRE) { info.edge = RISING_EDGE; @@ -744,6 +910,24 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port info.setup = getDelayFromNS(1); info.hold = getDelayFromNS(0); } + } else if (cell->type == id_IOLOGIC || cell->type == id_SIOLOGIC) { + info.clock_port = id_CLK; + if (cell->ports.at(port).type == PORT_OUT) { + info.clockToQ = getDelayFromNS(0.5); + } else { + info.setup = getDelayFromNS(0.1); + info.hold = getDelayFromNS(0); + } + } else if (cell->type == id_DQSBUFM) { + info.clock_port = id_SCLK; + if (port == id_DATAVALID) { + info.clockToQ = getDelayFromNS(0.2); + } else if (port == id_READ0 || port == id_READ1) { + info.setup = getDelayFromNS(0.5); + info.hold = getDelayFromNS(-0.4); + } else { + NPNR_ASSERT_FALSE("unknown DQSBUFM register port"); + } } return info; } @@ -765,4 +949,53 @@ GlobalInfoPOD Arch::globalInfoAtLoc(Location loc) return chip_info->location_glbinfo[locidx]; } +bool Arch::getPIODQSGroup(BelId pio, bool &dqsright, int &dqsrow) +{ + for (int i = 0; i < chip_info->num_pios; i++) { + if (Location(chip_info->pio_info[i].abs_loc) == pio.location && chip_info->pio_info[i].bel_index == pio.index) { + int dqs = chip_info->pio_info[i].dqsgroup; + if (dqs == -1) + return false; + else { + dqsright = (dqs & 2048) != 0; + dqsrow = dqs & 0x1FF; + return true; + } + } + } + NPNR_ASSERT_FALSE("failed to find PIO"); +} + +BelId Arch::getDQSBUF(bool dqsright, int dqsrow) +{ + BelId bel; + bel.location.y = dqsrow; + bel.location.x = (dqsright ? (chip_info->width - 1) : 0); + for (int i = 0; i < locInfo(bel)->num_bels; i++) { + auto &bd = locInfo(bel)->bel_data[i]; + if (bd.type == id_DQSBUFM.index) { + bel.index = i; + return bel; + } + } + NPNR_ASSERT_FALSE("failed to find DQSBUF"); +} + +WireId Arch::getBankECLK(int bank, int eclk) +{ + return getWireByLocAndBasename(Location(0, 0), "G_BANK" + std::to_string(bank) + "ECLK" + std::to_string(eclk)); +} + +#ifdef WITH_HEAP +const std::string Arch::defaultPlacer = "heap"; +#else +const std::string Arch::defaultPlacer = "sa"; +#endif + +const std::vector<std::string> Arch::availablePlacers = {"sa", +#ifdef WITH_HEAP + "heap" +#endif +}; + NEXTPNR_NAMESPACE_END diff --git a/ecp5/arch.h b/ecp5/arch.h index a68673f4..3de06a42 100644 --- a/ecp5/arch.h +++ b/ecp5/arch.h @@ -103,7 +103,7 @@ NPNR_PACKED_STRUCT(struct PIOInfoPOD { int32_t bel_index; RelPtr<char> function_name; int16_t bank; - int16_t padding; + int16_t dqsgroup; }); NPNR_PACKED_STRUCT(struct PackagePinPOD { @@ -204,7 +204,7 @@ NPNR_PACKED_STRUCT(struct ChipInfoPOD { RelPtr<SpeedGradePOD> speed_grades; }); -#if defined(_MSC_VER) +#if defined(_MSC_VER) || defined(EXTERNAL_CHIPDB_ROOT) extern const char *chipdb_blob_25k; extern const char *chipdb_blob_45k; extern const char *chipdb_blob_85k; @@ -448,6 +448,30 @@ struct ArchArgs } speed = SPEED_6; }; +struct DelayKey +{ + IdString celltype, from, to; + inline bool operator==(const DelayKey &other) const + { + return celltype == other.celltype && from == other.from && to == other.to; + } +}; + +NEXTPNR_NAMESPACE_END +namespace std { +template <> struct hash<NEXTPNR_NAMESPACE_PREFIX DelayKey> +{ + std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX DelayKey &dk) const noexcept + { + std::size_t seed = std::hash<NEXTPNR_NAMESPACE_PREFIX IdString>()(dk.celltype); + seed ^= std::hash<NEXTPNR_NAMESPACE_PREFIX IdString>()(dk.from) + 0x9e3779b9 + (seed << 6) + (seed >> 2); + seed ^= std::hash<NEXTPNR_NAMESPACE_PREFIX IdString>()(dk.to) + 0x9e3779b9 + (seed << 6) + (seed >> 2); + return seed; + } +}; +} // namespace std +NEXTPNR_NAMESPACE_BEGIN + struct Arch : BaseCtx { const ChipInfoPOD *chip_info; @@ -918,7 +942,7 @@ struct Arch : BaseCtx delay_t estimateDelay(WireId src, WireId dst) const; delay_t predictDelay(const NetInfo *net_info, const PortRef &sink) const; delay_t getDelayEpsilon() const { return 20; } - delay_t getRipupDelayPenalty() const { return 200; } + delay_t getRipupDelayPenalty() const { return 400; } float getDelayNS(delay_t v) const { return v * 0.001; } DelayInfo getDelayFromNS(float ns) const { @@ -971,6 +995,8 @@ struct Arch : BaseCtx void assignArchInfo(); + void permute_luts(); + std::vector<std::pair<std::string, std::string>> getTilesAtLocation(int row, int col); std::string getTileByTypeAndLocation(int row, int col, std::string type) const { @@ -993,8 +1019,23 @@ struct Arch : BaseCtx NPNR_ASSERT_FALSE_STR("no tile at (" + std::to_string(col) + ", " + std::to_string(row) + ") with type in set"); } + std::string getTileByType(std::string type) const + { + for (int i = 0; i < chip_info->height * chip_info->width; i++) { + auto &tileloc = chip_info->tile_info[i]; + for (int j = 0; j < tileloc.num_tiles; j++) + if (chip_info->tiletype_names[tileloc.tile_names[j].type_idx].get() == type) + return tileloc.tile_names[j].name.get(); + } + NPNR_ASSERT_FALSE_STR("no with type " + type); + } + GlobalInfoPOD globalInfoAtLoc(Location loc); + bool getPIODQSGroup(BelId pio, bool &dqsright, int &dqsrow); + BelId getDQSBUF(bool dqsright, int dqsrow); + WireId getBankECLK(int bank, int eclk); + // Apply LPF constraints to the context bool applyLPF(std::string filename, std::istream &in); @@ -1002,6 +1043,11 @@ struct Arch : BaseCtx IdString id_clk, id_lsr; IdString id_clkmux, id_lsrmux; IdString id_srmode, id_mode; + + mutable std::unordered_map<DelayKey, std::pair<bool, DelayInfo>> celldelay_cache; + + static const std::string defaultPlacer; + static const std::vector<std::string> availablePlacers; }; NEXTPNR_NAMESPACE_END diff --git a/ecp5/arch_place.cc b/ecp5/arch_place.cc index ff70bb5a..e5c9b31f 100644 --- a/ecp5/arch_place.cc +++ b/ecp5/arch_place.cc @@ -18,8 +18,10 @@ */ #include "cells.h" +#include "design_utils.h" #include "log.h" #include "nextpnr.h" +#include "timing.h" #include "util.h" NEXTPNR_NAMESPACE_BEGIN @@ -115,4 +117,76 @@ bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const } } +void Arch::permute_luts() +{ + NetCriticalityMap nc; + get_criticalities(getCtx(), &nc); + + std::unordered_map<PortInfo *, size_t> port_to_user; + for (auto net : sorted(nets)) { + NetInfo *ni = net.second; + for (size_t i = 0; i < ni->users.size(); i++) { + auto &usr = ni->users.at(i); + port_to_user[&(usr.cell->ports.at(usr.port))] = i; + } + } + + auto proc_lut = [&](CellInfo *ci, int lut) { + std::vector<IdString> port_names; + for (int i = 0; i < 4; i++) + port_names.push_back(id(std::string("ABCD").substr(i, 1) + std::to_string(lut))); + + std::vector<std::pair<float, int>> inputs; + std::vector<NetInfo *> orig_nets; + + for (int i = 0; i < 4; i++) { + auto &port = ci->ports.at(port_names.at(i)); + float crit = 0; + if (port.net != nullptr && nc.count(port.net->name)) { + auto &n = nc.at(port.net->name); + size_t usr = port_to_user.at(&port); + if (usr < n.criticality.size()) + crit = n.criticality.at(usr); + } + orig_nets.push_back(port.net); + inputs.emplace_back(crit, i); + } + // Least critical first (A input is slowest) + std::sort(inputs.begin(), inputs.end()); + for (int i = 0; i < 4; i++) { + IdString p = port_names.at(i); + // log_info("%s %s %f\n", p.c_str(ctx), port_names.at(inputs.at(i).second).c_str(ctx), inputs.at(i).first); + disconnect_port(getCtx(), ci, p); + ci->ports.at(p).net = nullptr; + if (orig_nets.at(inputs.at(i).second) != nullptr) { + connect_port(getCtx(), orig_nets.at(inputs.at(i).second), ci, p); + ci->params[id(p.str(this) + "MUX")] = p.str(this); + } else { + ci->params[id(p.str(this) + "MUX")] = "1"; + } + } + // Rewrite function + int old_init = int_or_default(ci->params, id("LUT" + std::to_string(lut) + "_INITVAL"), 0); + int new_init = 0; + for (int i = 0; i < 16; i++) { + int old_index = 0; + for (int k = 0; k < 4; k++) { + if (i & (1 << k)) + old_index |= (1 << inputs.at(k).second); + } + if (old_init & (1 << old_index)) + new_init |= (1 << i); + } + ci->params[id("LUT" + std::to_string(lut) + "_INITVAL")] = std::to_string(new_init); + }; + + for (auto cell : sorted(cells)) { + CellInfo *ci = cell.second; + if (ci->type == id_TRELLIS_SLICE && str_or_default(ci->params, id("MODE"), "LOGIC") == "LOGIC") { + proc_lut(ci, 0); + proc_lut(ci, 1); + } + } +} + NEXTPNR_NAMESPACE_END diff --git a/ecp5/arch_pybindings.cc b/ecp5/arch_pybindings.cc index 5e73a673..18d21112 100644 --- a/ecp5/arch_pybindings.cc +++ b/ecp5/arch_pybindings.cc @@ -133,6 +133,13 @@ void arch_wrap_python() fn_wrapper_2a_v<Context, decltype(&Context::addClock), &Context::addClock, conv_from_str<IdString>, pass_through<float>>::def_wrap(ctx_cls, "addClock"); + fn_wrapper_5a_v<Context, decltype(&Context::createRectangularRegion), &Context::createRectangularRegion, + conv_from_str<IdString>, pass_through<int>, pass_through<int>, pass_through<int>, + pass_through<int>>::def_wrap(ctx_cls, "createRectangularRegion"); + fn_wrapper_2a_v<Context, decltype(&Context::addBelToRegion), &Context::addBelToRegion, conv_from_str<IdString>, + conv_from_str<BelId>>::def_wrap(ctx_cls, "addBelToRegion"); + fn_wrapper_2a_v<Context, decltype(&Context::constrainCellToRegion), &Context::constrainCellToRegion, + conv_from_str<IdString>, conv_from_str<IdString>>::def_wrap(ctx_cls, "constrainCellToRegion"); WRAP_RANGE(Bel, conv_to_str<BelId>); WRAP_RANGE(Wire, conv_to_str<WireId>); diff --git a/ecp5/archdefs.h b/ecp5/archdefs.h index bfc5769b..d7ea0a8e 100644 --- a/ecp5/archdefs.h +++ b/ecp5/archdefs.h @@ -159,7 +159,9 @@ struct ArchCellInfo { bool using_dff; bool has_l6mux; + bool is_carry; IdString clk_sig, lsr_sig, clkmux, lsrmux, srmode; + int sd0, sd1; } sliceInfo; }; diff --git a/ecp5/baseconfigs.cc b/ecp5/baseconfigs.cc new file mode 100644 index 00000000..3dc07b22 --- /dev/null +++ b/ecp5/baseconfigs.cc @@ -0,0 +1,2630 @@ +#include "config.h" +#include "nextpnr.h" + +NEXTPNR_NAMESPACE_BEGIN +namespace BaseConfigs { +void config_empty_lfe5u_25f(ChipConfig &cc) +{ + cc.chip_name = "LFE5U-25F"; + cc.tiles["CIB_R49C3:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C3:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C42:VCIB_DCU0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C43:VCIB_DCUA"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C44:VCIB_DCUB"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C45:VCIB_DCUC"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C46:VCIB_DCUD"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C47:VCIB_DCUF"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C48:VCIB_DCU3"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C49:VCIB_DCU2"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C49:VCIB_DCU2"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C49:VCIB_DCU2"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C49:VCIB_DCU2"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C49:VCIB_DCU2"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C49:VCIB_DCU2"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C49:VCIB_DCU2"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C49:VCIB_DCU2"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C50:VCIB_DCUG"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C50:VCIB_DCUG"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C50:VCIB_DCUG"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C50:VCIB_DCUG"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C50:VCIB_DCUG"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C50:VCIB_DCUG"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C50:VCIB_DCUG"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C50:VCIB_DCUG"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C51:VCIB_DCUH"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C51:VCIB_DCUH"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C51:VCIB_DCUH"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C51:VCIB_DCUH"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C51:VCIB_DCUH"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C51:VCIB_DCUH"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C51:VCIB_DCUH"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C51:VCIB_DCUH"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C52:VCIB_DCUI"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C52:VCIB_DCUI"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C52:VCIB_DCUI"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C52:VCIB_DCUI"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R49C52:VCIB_DCUI"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C52:VCIB_DCUI"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C52:VCIB_DCUI"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C52:VCIB_DCUI"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C53:VCIB_DCU1"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R49C53:VCIB_DCU1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C53:VCIB_DCU1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C53:VCIB_DCU1"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R49C53:VCIB_DCU1"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R49C69:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C69:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C6:CIB_EFB0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C6:CIB_EFB0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R49C6:CIB_EFB0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA6MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB6MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JC3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JC5MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JD3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JD5MUX", "0"); + cc.tiles["MIB_R13C31:CMUX_UL_0"].add_arc("G_DCS0CLK0", "G_VPFN0000"); + cc.tiles["MIB_R13C32:CMUX_UR_0"].add_arc("G_DCS0CLK1", "G_VPFN0000"); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(2, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(3, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(5, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(11, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(13, 0); + cc.tiles["MIB_R37C31:CMUX_LL_0"].add_arc("G_DCS1CLK0", "G_VPFN0000"); + cc.tiles["MIB_R37C32:CMUX_LR_0"].add_arc("G_DCS1CLK1", "G_VPFN0000"); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(54, 1); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(56, 1); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(82, 1); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(94, 1); +} + +void config_empty_lfe5u_45f(ChipConfig &cc) +{ + cc.chip_name = "LFE5U-45F"; + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(2, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(3, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(5, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(11, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(13, 0); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R5C89:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C89:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C3:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C3:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C42:VCIB_DCU0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C43:VCIB_DCUA"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C44:VCIB_DCUB"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C45:VCIB_DCUC"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C46:VCIB_DCUD"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C47:VCIB_DCUF"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C48:VCIB_DCU3"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C49:VCIB_DCU2"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C49:VCIB_DCU2"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C49:VCIB_DCU2"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C49:VCIB_DCU2"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C49:VCIB_DCU2"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C49:VCIB_DCU2"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C49:VCIB_DCU2"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C49:VCIB_DCU2"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C50:VCIB_DCUG"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C50:VCIB_DCUG"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C50:VCIB_DCUG"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C50:VCIB_DCUG"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C50:VCIB_DCUG"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C50:VCIB_DCUG"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C50:VCIB_DCUG"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C50:VCIB_DCUG"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C51:VCIB_DCUH"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C51:VCIB_DCUH"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C51:VCIB_DCUH"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C51:VCIB_DCUH"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C51:VCIB_DCUH"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C51:VCIB_DCUH"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C51:VCIB_DCUH"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C51:VCIB_DCUH"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C52:VCIB_DCUI"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C52:VCIB_DCUI"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C52:VCIB_DCUI"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C52:VCIB_DCUI"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C52:VCIB_DCUI"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C52:VCIB_DCUI"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C52:VCIB_DCUI"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C52:VCIB_DCUI"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C53:VCIB_DCU1"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C53:VCIB_DCU1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C53:VCIB_DCU1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C53:VCIB_DCU1"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C53:VCIB_DCU1"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C69:VCIB_DCU0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C6:CIB_EFB0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C6:CIB_EFB0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C6:CIB_EFB0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C70:VCIB_DCUA"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C71:VCIB_DCUB"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C72:VCIB_DCUC"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C73:VCIB_DCUD"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C74:VCIB_DCUF"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C75:VCIB_DCU3"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C76:VCIB_DCU2"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C76:VCIB_DCU2"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C76:VCIB_DCU2"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C76:VCIB_DCU2"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C76:VCIB_DCU2"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C76:VCIB_DCU2"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C76:VCIB_DCU2"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C76:VCIB_DCU2"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C77:VCIB_DCUG"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C77:VCIB_DCUG"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C77:VCIB_DCUG"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C77:VCIB_DCUG"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C77:VCIB_DCUG"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C77:VCIB_DCUG"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C77:VCIB_DCUG"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C77:VCIB_DCUG"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C78:VCIB_DCUH"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C78:VCIB_DCUH"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C78:VCIB_DCUH"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C78:VCIB_DCUH"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C78:VCIB_DCUH"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C78:VCIB_DCUH"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C78:VCIB_DCUH"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C78:VCIB_DCUH"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C79:VCIB_DCUI"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C79:VCIB_DCUI"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C79:VCIB_DCUI"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C79:VCIB_DCUI"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R70C79:VCIB_DCUI"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C79:VCIB_DCUI"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C79:VCIB_DCUI"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C79:VCIB_DCUI"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA6MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB6MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JC3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JC5MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JD3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JD5MUX", "0"); + cc.tiles["CIB_R70C80:VCIB_DCU1"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R70C80:VCIB_DCU1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C80:VCIB_DCU1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C80:VCIB_DCU1"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R70C80:VCIB_DCU1"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R70C87:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C87:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["MIB_R10C40:CMUX_UL_0"].add_arc("G_DCS0CLK0", "G_VPFN0000"); + cc.tiles["MIB_R10C41:CMUX_UR_0"].add_arc("G_DCS0CLK1", "G_VPFN0000"); + cc.tiles["MIB_R58C40:CMUX_LL_0"].add_arc("G_DCS1CLK0", "G_VPFN0000"); + cc.tiles["MIB_R58C41:CMUX_LR_0"].add_arc("G_DCS1CLK1", "G_VPFN0000"); + cc.tiles["MIB_R71C3:BANKREF8"].add_unknown(18, 0); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(54, 1); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(56, 1); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(82, 1); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(94, 1); +} + +void config_empty_lfe5u_85f(ChipConfig &cc) +{ + cc.chip_name = "LFE5U-85F"; + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(2, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(3, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(5, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(11, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(13, 0); + cc.tiles["CIB_R5C125:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C125:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C123:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C123:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C3:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C3:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C46:VCIB_DCU0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C47:VCIB_DCUA"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C48:VCIB_DCUB"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C49:VCIB_DCUC"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C50:VCIB_DCUD"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C51:VCIB_DCUF"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C52:VCIB_DCU3"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C53:VCIB_DCU2"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C53:VCIB_DCU2"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C53:VCIB_DCU2"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C53:VCIB_DCU2"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C53:VCIB_DCU2"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C53:VCIB_DCU2"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C53:VCIB_DCU2"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C53:VCIB_DCU2"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C54:VCIB_DCUG"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C54:VCIB_DCUG"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C54:VCIB_DCUG"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C54:VCIB_DCUG"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C54:VCIB_DCUG"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C54:VCIB_DCUG"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C54:VCIB_DCUG"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C54:VCIB_DCUG"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C55:VCIB_DCUH"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C55:VCIB_DCUH"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C55:VCIB_DCUH"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C55:VCIB_DCUH"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C55:VCIB_DCUH"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C55:VCIB_DCUH"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C55:VCIB_DCUH"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C55:VCIB_DCUH"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C56:VCIB_DCUI"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C56:VCIB_DCUI"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C56:VCIB_DCUI"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C56:VCIB_DCUI"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C56:VCIB_DCUI"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C56:VCIB_DCUI"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C56:VCIB_DCUI"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C56:VCIB_DCUI"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C57:VCIB_DCU1"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C57:VCIB_DCU1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C57:VCIB_DCU1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C57:VCIB_DCU1"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C57:VCIB_DCU1"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C6:CIB_EFB0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C6:CIB_EFB0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C6:CIB_EFB0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C71:VCIB_DCU0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C72:VCIB_DCUA"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C73:VCIB_DCUB"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C74:VCIB_DCUC"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C75:VCIB_DCUD"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JA1MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JC2MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C76:VCIB_DCUF"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JA7MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JC0MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C77:VCIB_DCU3"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C78:VCIB_DCU2"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C78:VCIB_DCU2"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C78:VCIB_DCU2"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C78:VCIB_DCU2"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C78:VCIB_DCU2"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C78:VCIB_DCU2"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C78:VCIB_DCU2"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C78:VCIB_DCU2"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C79:VCIB_DCUG"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C79:VCIB_DCUG"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C79:VCIB_DCUG"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C79:VCIB_DCUG"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C79:VCIB_DCUG"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C79:VCIB_DCUG"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C79:VCIB_DCUG"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C79:VCIB_DCUG"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA6MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB6MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JC3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JC5MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JD3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JD5MUX", "0"); + cc.tiles["CIB_R94C80:VCIB_DCUH"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C80:VCIB_DCUH"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C80:VCIB_DCUH"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C80:VCIB_DCUH"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C80:VCIB_DCUH"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C80:VCIB_DCUH"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C80:VCIB_DCUH"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C80:VCIB_DCUH"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C81:VCIB_DCUI"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C81:VCIB_DCUI"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C81:VCIB_DCUI"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C81:VCIB_DCUI"].add_enum("CIB.JB7MUX", "0"); + cc.tiles["CIB_R94C81:VCIB_DCUI"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C81:VCIB_DCUI"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["CIB_R94C81:VCIB_DCUI"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C81:VCIB_DCUI"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C82:VCIB_DCU1"].add_enum("CIB.JB1MUX", "0"); + cc.tiles["CIB_R94C82:VCIB_DCU1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C82:VCIB_DCU1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C82:VCIB_DCU1"].add_enum("CIB.JD0MUX", "0"); + cc.tiles["CIB_R94C82:VCIB_DCU1"].add_enum("CIB.JD2MUX", "0"); + cc.tiles["MIB_R22C67:CMUX_UL_0"].add_arc("G_DCS0CLK0", "G_VPFN0000"); + cc.tiles["MIB_R22C68:CMUX_UR_0"].add_arc("G_DCS0CLK1", "G_VPFN0000"); + cc.tiles["MIB_R70C67:CMUX_LL_0"].add_arc("G_DCS1CLK0", "G_VPFN0000"); + cc.tiles["MIB_R70C68:CMUX_LR_0"].add_arc("G_DCS1CLK1", "G_VPFN0000"); + cc.tiles["MIB_R95C101:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C102:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C103:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C104:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C105:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C106:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C107:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C108:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C110:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C111:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C112:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C113:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C114:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C115:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C116:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C117:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C119:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C120:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C121:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C122:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(54, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(56, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(82, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(94, 1); + cc.tiles["MIB_R95C96:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C97:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C98:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C99:PICB1"].add_unknown(0, 1); +} + +void config_empty_lfe5um_25f(ChipConfig &cc) +{ + cc.chip_name = "LFE5UM-25F"; + cc.tiles["CIB_R49C3:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C3:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(20, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(21, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(22, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(23, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(28, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(29, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(30, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(31, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(74, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(75, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(76, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(77, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(82, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(83, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(84, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(85, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(20, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(21, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(22, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(23, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(28, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(29, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(30, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(31, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(74, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(75, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(76, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(77, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(82, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(83, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(84, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(85, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(20, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(21, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(22, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(23, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(28, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(29, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(30, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(31, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(74, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(75, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(76, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(77, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(82, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(83, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(84, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(85, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(20, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(21, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(22, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(23, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(28, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(29, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(30, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(31, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(74, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(75, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(76, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(77, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(82, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(83, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(84, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(85, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(20, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(21, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(22, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(23, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(28, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(29, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(31, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(74, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(75, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(76, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(77, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(82, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(83, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(84, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(85, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(20, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(21, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(22, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(23, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(28, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(29, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(30, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(31, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(74, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(75, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(76, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(77, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(82, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(83, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(84, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(85, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(20, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(22, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(23, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(29, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(31, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(74, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(75, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(76, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(77, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(82, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(83, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(84, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(85, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(20, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(22, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(29, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(31, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(74, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(76, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(83, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(85, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(20, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(22, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(29, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(31, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(74, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(76, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(83, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(85, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(20, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(22, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(29, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(31, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(74, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(76, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(83, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(85, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(20, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(22, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(29, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(31, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(74, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(76, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(83, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(85, 10); + cc.tiles["CIB_R49C53:CIB_DCU1"].add_unknown(20, 10); + cc.tiles["CIB_R49C53:CIB_DCU1"].add_unknown(22, 10); + cc.tiles["CIB_R49C53:CIB_DCU1"].add_unknown(29, 10); + cc.tiles["CIB_R49C53:CIB_DCU1"].add_unknown(31, 10); + cc.tiles["CIB_R49C53:CIB_DCU1"].add_unknown(74, 10); + cc.tiles["CIB_R49C69:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C69:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C6:CIB_EFB0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C6:CIB_EFB0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R49C6:CIB_EFB0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA6MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB6MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JC3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JC5MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JD3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JD5MUX", "0"); + cc.tiles["MIB_R13C31:CMUX_UL_0"].add_arc("G_DCS0CLK0", "G_VPFN0000"); + cc.tiles["MIB_R13C32:CMUX_UR_0"].add_arc("G_DCS0CLK1", "G_VPFN0000"); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(2, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(3, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(5, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(11, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(13, 0); + cc.tiles["MIB_R37C31:CMUX_LL_0"].add_arc("G_DCS1CLK0", "G_VPFN0000"); + cc.tiles["MIB_R37C32:CMUX_LR_0"].add_arc("G_DCS1CLK1", "G_VPFN0000"); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(54, 1); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(56, 1); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(82, 1); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(94, 1); +} + +void config_empty_lfe5um_45f(ChipConfig &cc) +{ + cc.chip_name = "LFE5UM-45F"; + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(2, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(3, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(5, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(11, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(13, 0); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R5C89:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C89:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C3:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C3:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(20, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(21, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(22, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(23, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(28, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(29, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(30, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(31, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(74, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(75, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(76, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(77, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(82, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(83, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(84, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(85, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(20, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(21, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(22, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(23, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(28, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(29, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(30, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(31, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(74, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(75, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(76, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(77, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(82, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(83, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(84, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(85, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(20, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(21, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(22, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(23, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(28, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(29, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(30, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(31, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(74, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(75, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(76, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(77, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(82, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(83, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(84, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(85, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(20, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(21, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(22, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(23, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(28, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(29, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(30, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(31, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(74, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(75, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(76, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(77, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(82, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(83, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(84, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(85, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(20, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(21, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(22, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(23, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(28, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(29, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(31, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(74, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(75, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(76, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(77, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(82, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(83, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(84, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(85, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(20, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(21, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(22, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(23, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(28, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(29, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(30, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(31, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(74, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(75, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(76, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(77, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(82, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(83, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(84, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(85, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(20, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(22, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(23, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(29, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(31, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(74, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(75, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(76, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(77, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(82, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(83, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(84, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(85, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(20, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(22, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(29, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(31, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(74, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(76, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(83, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(85, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(20, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(22, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(29, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(31, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(74, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(76, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(83, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(85, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(20, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(22, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(29, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(31, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(74, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(76, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(83, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(85, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(20, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(22, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(29, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(31, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(74, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(76, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(83, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(85, 10); + cc.tiles["CIB_R70C53:CIB_DCU1"].add_unknown(20, 10); + cc.tiles["CIB_R70C53:CIB_DCU1"].add_unknown(22, 10); + cc.tiles["CIB_R70C53:CIB_DCU1"].add_unknown(29, 10); + cc.tiles["CIB_R70C53:CIB_DCU1"].add_unknown(31, 10); + cc.tiles["CIB_R70C53:CIB_DCU1"].add_unknown(74, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(20, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(21, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(22, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(23, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(28, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(29, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(30, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(31, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(74, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(75, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(76, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(77, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(82, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(83, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(84, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(85, 10); + cc.tiles["CIB_R70C6:CIB_EFB0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C6:CIB_EFB0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C6:CIB_EFB0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(20, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(21, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(22, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(23, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(28, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(29, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(30, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(31, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(74, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(75, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(76, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(77, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(82, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(83, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(84, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(85, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(20, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(21, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(22, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(23, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(28, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(29, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(30, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(31, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(74, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(75, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(76, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(77, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(82, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(83, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(84, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(85, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(20, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(21, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(22, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(23, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(28, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(29, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(30, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(31, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(74, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(75, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(76, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(77, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(82, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(83, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(84, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(85, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(20, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(21, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(22, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(23, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(28, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(29, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(31, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(74, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(75, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(76, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(77, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(82, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(83, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(84, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(85, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(20, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(21, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(22, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(23, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(28, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(29, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(30, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(31, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(74, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(75, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(76, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(77, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(82, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(83, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(84, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(85, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(20, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(22, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(23, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(29, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(31, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(74, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(75, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(76, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(77, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(82, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(83, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(84, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(85, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(20, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(22, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(29, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(31, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(74, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(76, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(83, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(85, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(20, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(22, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(29, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(31, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(74, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(76, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(83, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(85, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(20, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(22, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(29, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(31, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(74, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(76, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(83, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(85, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(20, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(22, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(29, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(31, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(74, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(76, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(83, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(85, 10); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA6MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB6MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JC3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JC5MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JD3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JD5MUX", "0"); + cc.tiles["CIB_R70C80:CIB_DCU1"].add_unknown(20, 10); + cc.tiles["CIB_R70C80:CIB_DCU1"].add_unknown(22, 10); + cc.tiles["CIB_R70C80:CIB_DCU1"].add_unknown(29, 10); + cc.tiles["CIB_R70C80:CIB_DCU1"].add_unknown(31, 10); + cc.tiles["CIB_R70C80:CIB_DCU1"].add_unknown(74, 10); + cc.tiles["CIB_R70C87:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C87:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["MIB_R10C40:CMUX_UL_0"].add_arc("G_DCS0CLK0", "G_VPFN0000"); + cc.tiles["MIB_R10C41:CMUX_UR_0"].add_arc("G_DCS0CLK1", "G_VPFN0000"); + cc.tiles["MIB_R58C40:CMUX_LL_0"].add_arc("G_DCS1CLK0", "G_VPFN0000"); + cc.tiles["MIB_R58C41:CMUX_LR_0"].add_arc("G_DCS1CLK1", "G_VPFN0000"); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(54, 1); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(56, 1); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(82, 1); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(94, 1); +} + +void config_empty_lfe5um5g_25f(ChipConfig &cc) +{ + cc.chip_name = "LFE5UM5G-25F"; + cc.tiles["CIB_R49C3:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C3:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(20, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(21, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(22, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(23, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(28, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(29, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(30, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(31, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(74, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(75, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(76, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(77, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(82, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(83, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(84, 10); + cc.tiles["CIB_R49C42:CIB_DCU0"].add_unknown(85, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(20, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(21, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(22, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(23, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(28, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(29, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(30, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(31, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(74, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(75, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(76, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(77, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(82, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(83, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(84, 10); + cc.tiles["CIB_R49C43:CIB_DCUA"].add_unknown(85, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(20, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(21, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(22, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(23, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(28, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(29, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(30, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(31, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(74, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(75, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(76, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(77, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(82, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(83, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(84, 10); + cc.tiles["CIB_R49C44:CIB_DCUB"].add_unknown(85, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(20, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(21, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(22, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(23, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(28, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(29, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(30, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(31, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(74, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(75, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(76, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(77, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(82, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(83, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(84, 10); + cc.tiles["CIB_R49C45:CIB_DCUC"].add_unknown(85, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(20, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(21, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(22, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(23, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(28, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(29, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(31, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(74, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(75, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(76, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(77, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(82, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(83, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(84, 10); + cc.tiles["CIB_R49C46:CIB_DCUD"].add_unknown(85, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(20, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(21, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(22, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(23, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(28, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(29, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(30, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(31, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(74, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(75, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(76, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(77, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(82, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(83, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(84, 10); + cc.tiles["CIB_R49C47:CIB_DCUF"].add_unknown(85, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(20, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(22, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(23, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(29, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(31, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(74, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(75, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(76, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(77, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(82, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(83, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(84, 10); + cc.tiles["CIB_R49C48:CIB_DCU3"].add_unknown(85, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(20, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(22, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(29, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(31, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(74, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(76, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(83, 10); + cc.tiles["CIB_R49C49:CIB_DCU2"].add_unknown(85, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(20, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(22, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(29, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(31, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(74, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(76, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(83, 10); + cc.tiles["CIB_R49C50:CIB_DCUG"].add_unknown(85, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(20, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(22, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(29, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(31, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(74, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(76, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(83, 10); + cc.tiles["CIB_R49C51:CIB_DCUH"].add_unknown(85, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(20, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(22, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(29, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(31, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(74, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(76, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(83, 10); + cc.tiles["CIB_R49C52:CIB_DCUI"].add_unknown(85, 10); + cc.tiles["CIB_R49C53:CIB_DCU1"].add_unknown(20, 10); + cc.tiles["CIB_R49C53:CIB_DCU1"].add_unknown(22, 10); + cc.tiles["CIB_R49C53:CIB_DCU1"].add_unknown(29, 10); + cc.tiles["CIB_R49C53:CIB_DCU1"].add_unknown(31, 10); + cc.tiles["CIB_R49C53:CIB_DCU1"].add_unknown(74, 10); + cc.tiles["CIB_R49C69:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C69:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C6:CIB_EFB0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C6:CIB_EFB0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R49C6:CIB_EFB0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JA6MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JB6MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JC3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JC5MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JD3MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R49C7:CIB_EFB1"].add_enum("CIB.JD5MUX", "0"); + cc.tiles["MIB_R13C31:CMUX_UL_0"].add_arc("G_DCS0CLK0", "G_VPFN0000"); + cc.tiles["MIB_R13C32:CMUX_UR_0"].add_arc("G_DCS0CLK1", "G_VPFN0000"); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(2, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(3, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(5, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(11, 0); + cc.tiles["MIB_R13C3:DSP_SPINE_UL1"].add_unknown(13, 0); + cc.tiles["MIB_R37C31:CMUX_LL_0"].add_arc("G_DCS1CLK0", "G_VPFN0000"); + cc.tiles["MIB_R37C32:CMUX_LR_0"].add_arc("G_DCS1CLK1", "G_VPFN0000"); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(54, 1); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(56, 1); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(82, 1); + cc.tiles["MIB_R50C4:EFB0_PICB0"].add_unknown(94, 1); +} + +void config_empty_lfe5um5g_45f(ChipConfig &cc) +{ + cc.chip_name = "LFE5UM5G-45F"; + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(2, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(3, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(5, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(11, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(13, 0); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R5C89:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C89:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C3:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C3:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(20, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(21, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(22, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(23, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(28, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(29, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(30, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(31, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(74, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(75, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(76, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(77, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(82, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(83, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(84, 10); + cc.tiles["CIB_R70C42:CIB_DCU0"].add_unknown(85, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(20, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(21, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(22, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(23, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(28, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(29, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(30, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(31, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(74, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(75, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(76, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(77, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(82, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(83, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(84, 10); + cc.tiles["CIB_R70C43:CIB_DCUA"].add_unknown(85, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(20, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(21, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(22, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(23, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(28, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(29, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(30, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(31, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(74, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(75, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(76, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(77, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(82, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(83, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(84, 10); + cc.tiles["CIB_R70C44:CIB_DCUB"].add_unknown(85, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(20, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(21, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(22, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(23, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(28, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(29, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(30, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(31, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(74, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(75, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(76, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(77, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(82, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(83, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(84, 10); + cc.tiles["CIB_R70C45:CIB_DCUC"].add_unknown(85, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(20, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(21, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(22, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(23, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(28, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(29, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(31, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(74, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(75, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(76, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(77, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(82, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(83, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(84, 10); + cc.tiles["CIB_R70C46:CIB_DCUD"].add_unknown(85, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(20, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(21, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(22, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(23, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(28, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(29, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(30, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(31, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(74, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(75, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(76, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(77, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(82, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(83, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(84, 10); + cc.tiles["CIB_R70C47:CIB_DCUF"].add_unknown(85, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(20, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(22, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(23, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(29, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(31, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(74, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(75, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(76, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(77, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(82, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(83, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(84, 10); + cc.tiles["CIB_R70C48:CIB_DCU3"].add_unknown(85, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(20, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(22, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(29, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(31, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(74, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(76, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(83, 10); + cc.tiles["CIB_R70C49:CIB_DCU2"].add_unknown(85, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(20, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(22, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(29, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(31, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(74, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(76, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(83, 10); + cc.tiles["CIB_R70C50:CIB_DCUG"].add_unknown(85, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(20, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(22, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(29, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(31, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(74, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(76, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(83, 10); + cc.tiles["CIB_R70C51:CIB_DCUH"].add_unknown(85, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(20, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(22, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(29, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(31, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(74, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(76, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(83, 10); + cc.tiles["CIB_R70C52:CIB_DCUI"].add_unknown(85, 10); + cc.tiles["CIB_R70C53:CIB_DCU1"].add_unknown(20, 10); + cc.tiles["CIB_R70C53:CIB_DCU1"].add_unknown(22, 10); + cc.tiles["CIB_R70C53:CIB_DCU1"].add_unknown(29, 10); + cc.tiles["CIB_R70C53:CIB_DCU1"].add_unknown(31, 10); + cc.tiles["CIB_R70C53:CIB_DCU1"].add_unknown(74, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(20, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(21, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(22, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(23, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(28, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(29, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(30, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(31, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(74, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(75, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(76, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(77, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(82, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(83, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(84, 10); + cc.tiles["CIB_R70C69:CIB_DCU0"].add_unknown(85, 10); + cc.tiles["CIB_R70C6:CIB_EFB0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C6:CIB_EFB0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R70C6:CIB_EFB0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(20, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(21, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(22, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(23, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(28, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(29, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(30, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(31, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(74, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(75, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(76, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(77, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(82, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(83, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(84, 10); + cc.tiles["CIB_R70C70:CIB_DCUA"].add_unknown(85, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(20, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(21, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(22, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(23, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(28, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(29, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(30, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(31, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(74, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(75, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(76, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(77, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(82, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(83, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(84, 10); + cc.tiles["CIB_R70C71:CIB_DCUB"].add_unknown(85, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(20, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(21, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(22, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(23, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(28, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(29, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(30, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(31, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(74, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(75, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(76, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(77, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(82, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(83, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(84, 10); + cc.tiles["CIB_R70C72:CIB_DCUC"].add_unknown(85, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(20, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(21, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(22, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(23, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(28, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(29, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(31, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(74, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(75, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(76, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(77, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(82, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(83, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(84, 10); + cc.tiles["CIB_R70C73:CIB_DCUD"].add_unknown(85, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(20, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(21, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(22, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(23, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(28, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(29, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(30, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(31, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(74, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(75, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(76, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(77, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(82, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(83, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(84, 10); + cc.tiles["CIB_R70C74:CIB_DCUF"].add_unknown(85, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(20, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(22, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(23, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(29, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(31, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(74, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(75, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(76, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(77, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(82, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(83, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(84, 10); + cc.tiles["CIB_R70C75:CIB_DCU3"].add_unknown(85, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(20, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(22, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(29, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(31, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(74, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(76, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(83, 10); + cc.tiles["CIB_R70C76:CIB_DCU2"].add_unknown(85, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(20, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(22, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(29, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(31, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(74, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(76, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(83, 10); + cc.tiles["CIB_R70C77:CIB_DCUG"].add_unknown(85, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(20, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(22, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(29, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(31, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(74, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(76, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(83, 10); + cc.tiles["CIB_R70C78:CIB_DCUH"].add_unknown(85, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(20, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(22, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(29, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(31, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(74, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(76, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(83, 10); + cc.tiles["CIB_R70C79:CIB_DCUI"].add_unknown(85, 10); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JA6MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JB6MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JC3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JC5MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JD3MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R70C7:CIB_EFB1"].add_enum("CIB.JD5MUX", "0"); + cc.tiles["CIB_R70C80:CIB_DCU1"].add_unknown(20, 10); + cc.tiles["CIB_R70C80:CIB_DCU1"].add_unknown(22, 10); + cc.tiles["CIB_R70C80:CIB_DCU1"].add_unknown(29, 10); + cc.tiles["CIB_R70C80:CIB_DCU1"].add_unknown(31, 10); + cc.tiles["CIB_R70C80:CIB_DCU1"].add_unknown(74, 10); + cc.tiles["CIB_R70C87:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R70C87:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["MIB_R10C40:CMUX_UL_0"].add_arc("G_DCS0CLK0", "G_VPFN0000"); + cc.tiles["MIB_R10C41:CMUX_UR_0"].add_arc("G_DCS0CLK1", "G_VPFN0000"); + cc.tiles["MIB_R58C40:CMUX_LL_0"].add_arc("G_DCS1CLK0", "G_VPFN0000"); + cc.tiles["MIB_R58C41:CMUX_LR_0"].add_arc("G_DCS1CLK1", "G_VPFN0000"); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(54, 1); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(56, 1); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(82, 1); + cc.tiles["MIB_R71C4:EFB0_PICB0"].add_unknown(94, 1); +} + +void config_empty_lfe5um5g_85f(ChipConfig &cc) +{ + cc.chip_name = "LFE5UM5G-85F"; + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(2, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(3, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(5, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(11, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(13, 0); + cc.tiles["CIB_R5C125:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C125:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C123:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C123:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C3:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C3:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(20, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(21, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(22, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(23, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(28, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(29, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(30, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(31, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(74, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(75, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(76, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(77, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(82, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(83, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(84, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(85, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(20, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(21, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(22, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(23, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(28, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(29, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(30, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(31, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(74, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(75, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(76, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(77, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(82, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(83, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(84, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(85, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(20, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(21, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(22, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(23, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(28, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(29, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(30, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(31, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(74, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(75, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(76, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(77, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(82, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(83, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(84, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(85, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(20, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(21, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(22, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(23, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(28, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(29, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(30, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(31, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(74, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(75, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(76, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(77, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(82, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(83, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(84, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(85, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(20, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(21, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(22, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(23, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(28, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(29, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(31, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(74, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(75, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(76, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(77, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(82, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(83, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(84, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(85, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(20, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(21, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(22, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(23, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(28, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(29, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(30, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(31, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(74, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(75, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(76, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(77, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(82, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(83, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(84, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(85, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(20, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(22, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(23, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(29, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(31, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(74, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(75, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(76, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(77, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(82, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(83, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(84, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(85, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(20, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(22, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(29, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(31, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(74, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(76, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(83, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(85, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(20, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(22, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(29, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(31, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(74, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(76, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(83, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(85, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(20, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(22, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(29, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(31, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(74, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(76, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(83, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(85, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(20, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(22, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(29, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(31, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(74, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(76, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(83, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(85, 10); + cc.tiles["CIB_R94C57:CIB_DCU1"].add_unknown(20, 10); + cc.tiles["CIB_R94C57:CIB_DCU1"].add_unknown(22, 10); + cc.tiles["CIB_R94C57:CIB_DCU1"].add_unknown(29, 10); + cc.tiles["CIB_R94C57:CIB_DCU1"].add_unknown(31, 10); + cc.tiles["CIB_R94C57:CIB_DCU1"].add_unknown(74, 10); + cc.tiles["CIB_R94C6:CIB_EFB0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C6:CIB_EFB0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C6:CIB_EFB0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(20, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(21, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(22, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(23, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(28, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(29, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(30, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(31, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(74, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(75, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(76, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(77, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(82, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(83, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(84, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(85, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(20, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(21, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(22, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(23, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(28, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(29, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(30, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(31, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(74, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(75, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(76, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(77, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(82, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(83, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(84, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(85, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(20, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(21, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(22, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(23, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(28, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(29, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(30, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(31, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(74, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(75, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(76, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(77, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(82, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(83, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(84, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(85, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(20, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(21, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(22, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(23, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(28, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(29, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(30, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(31, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(74, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(75, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(76, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(77, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(82, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(83, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(84, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(85, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(20, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(21, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(22, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(23, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(28, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(29, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(31, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(74, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(75, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(76, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(77, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(82, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(83, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(84, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(85, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(20, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(21, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(22, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(23, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(28, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(29, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(30, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(31, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(74, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(75, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(76, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(77, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(82, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(83, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(84, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(85, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(20, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(22, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(23, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(29, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(31, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(74, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(75, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(76, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(77, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(82, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(83, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(84, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(85, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(20, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(22, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(29, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(31, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(74, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(76, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(83, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(85, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(20, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(22, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(29, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(31, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(74, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(76, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(83, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(85, 10); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA6MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB6MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JC3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JC5MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JD3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JD5MUX", "0"); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(20, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(22, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(29, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(31, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(74, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(76, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(83, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(85, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(20, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(22, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(29, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(31, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(74, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(76, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(83, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(85, 10); + cc.tiles["CIB_R94C82:CIB_DCU1"].add_unknown(20, 10); + cc.tiles["CIB_R94C82:CIB_DCU1"].add_unknown(22, 10); + cc.tiles["CIB_R94C82:CIB_DCU1"].add_unknown(29, 10); + cc.tiles["CIB_R94C82:CIB_DCU1"].add_unknown(31, 10); + cc.tiles["CIB_R94C82:CIB_DCU1"].add_unknown(74, 10); + cc.tiles["MIB_R22C67:CMUX_UL_0"].add_arc("G_DCS0CLK0", "G_VPFN0000"); + cc.tiles["MIB_R22C68:CMUX_UR_0"].add_arc("G_DCS0CLK1", "G_VPFN0000"); + cc.tiles["MIB_R70C67:CMUX_LL_0"].add_arc("G_DCS1CLK0", "G_VPFN0000"); + cc.tiles["MIB_R70C68:CMUX_LR_0"].add_arc("G_DCS1CLK1", "G_VPFN0000"); + cc.tiles["MIB_R95C101:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C102:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C103:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C104:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C105:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C106:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C107:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C108:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C110:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C111:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C112:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C113:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C114:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C115:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C116:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C117:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C119:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C120:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C121:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C122:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(54, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(56, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(82, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(94, 1); + cc.tiles["MIB_R95C96:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C97:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C98:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C99:PICB1"].add_unknown(0, 1); +} + +void config_empty_lfe5um_85f(ChipConfig &cc) +{ + cc.chip_name = "LFE5UM-85F"; + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(2, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(3, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(5, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(11, 0); + cc.tiles["CIB_R10C3:PVT_COUNT2"].add_unknown(13, 0); + cc.tiles["CIB_R5C125:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C125:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R5C1:CIB_PLL1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C123:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C123:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C3:CIB_PLL3"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C3:CIB_PLL3"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(20, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(21, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(22, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(23, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(28, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(29, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(30, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(31, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(74, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(75, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(76, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(77, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(82, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(83, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(84, 10); + cc.tiles["CIB_R94C46:CIB_DCU0"].add_unknown(85, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(20, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(21, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(22, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(23, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(28, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(29, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(30, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(31, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(74, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(75, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(76, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(77, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(82, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(83, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(84, 10); + cc.tiles["CIB_R94C47:CIB_DCUA"].add_unknown(85, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(20, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(21, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(22, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(23, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(28, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(29, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(30, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(31, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(74, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(75, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(76, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(77, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(82, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(83, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(84, 10); + cc.tiles["CIB_R94C48:CIB_DCUB"].add_unknown(85, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(20, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(21, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(22, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(23, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(28, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(29, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(30, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(31, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(74, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(75, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(76, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(77, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(82, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(83, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(84, 10); + cc.tiles["CIB_R94C49:CIB_DCUC"].add_unknown(85, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(20, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(21, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(22, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(23, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(28, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(29, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(31, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(74, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(75, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(76, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(77, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(82, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(83, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(84, 10); + cc.tiles["CIB_R94C50:CIB_DCUD"].add_unknown(85, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(20, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(21, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(22, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(23, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(28, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(29, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(30, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(31, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(74, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(75, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(76, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(77, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(82, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(83, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(84, 10); + cc.tiles["CIB_R94C51:CIB_DCUF"].add_unknown(85, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(20, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(22, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(23, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(29, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(31, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(74, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(75, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(76, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(77, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(82, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(83, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(84, 10); + cc.tiles["CIB_R94C52:CIB_DCU3"].add_unknown(85, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(20, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(22, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(29, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(31, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(74, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(76, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(83, 10); + cc.tiles["CIB_R94C53:CIB_DCU2"].add_unknown(85, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(20, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(22, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(29, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(31, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(74, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(76, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(83, 10); + cc.tiles["CIB_R94C54:CIB_DCUG"].add_unknown(85, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(20, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(22, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(29, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(31, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(74, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(76, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(83, 10); + cc.tiles["CIB_R94C55:CIB_DCUH"].add_unknown(85, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(20, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(22, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(29, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(31, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(74, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(76, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(83, 10); + cc.tiles["CIB_R94C56:CIB_DCUI"].add_unknown(85, 10); + cc.tiles["CIB_R94C57:CIB_DCU1"].add_unknown(20, 10); + cc.tiles["CIB_R94C57:CIB_DCU1"].add_unknown(22, 10); + cc.tiles["CIB_R94C57:CIB_DCU1"].add_unknown(29, 10); + cc.tiles["CIB_R94C57:CIB_DCU1"].add_unknown(31, 10); + cc.tiles["CIB_R94C57:CIB_DCU1"].add_unknown(74, 10); + cc.tiles["CIB_R94C6:CIB_EFB0"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C6:CIB_EFB0"].add_enum("CIB.JC6MUX", "0"); + cc.tiles["CIB_R94C6:CIB_EFB0"].add_enum("CIB.JD6MUX", "0"); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(20, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(21, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(22, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(23, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(28, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(29, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(30, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(31, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(74, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(75, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(76, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(77, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(82, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(83, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(84, 10); + cc.tiles["CIB_R94C71:CIB_DCU0"].add_unknown(85, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(20, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(21, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(22, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(23, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(28, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(29, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(30, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(31, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(74, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(75, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(76, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(77, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(82, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(83, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(84, 10); + cc.tiles["CIB_R94C72:CIB_DCUA"].add_unknown(85, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(20, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(21, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(22, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(23, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(28, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(29, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(30, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(31, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(74, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(75, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(76, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(77, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(82, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(83, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(84, 10); + cc.tiles["CIB_R94C73:CIB_DCUB"].add_unknown(85, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(20, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(21, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(22, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(23, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(28, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(29, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(30, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(31, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(74, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(75, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(76, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(77, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(82, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(83, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(84, 10); + cc.tiles["CIB_R94C74:CIB_DCUC"].add_unknown(85, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(20, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(21, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(22, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(23, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(28, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(29, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(31, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(74, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(75, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(76, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(77, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(82, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(83, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(84, 10); + cc.tiles["CIB_R94C75:CIB_DCUD"].add_unknown(85, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(20, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(21, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(22, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(23, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(28, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(29, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(30, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(31, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(74, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(75, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(76, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(77, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(82, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(83, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(84, 10); + cc.tiles["CIB_R94C76:CIB_DCUF"].add_unknown(85, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(20, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(22, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(23, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(29, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(31, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(74, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(75, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(76, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(77, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(82, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(83, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(84, 10); + cc.tiles["CIB_R94C77:CIB_DCU3"].add_unknown(85, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(20, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(22, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(29, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(31, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(74, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(76, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(83, 10); + cc.tiles["CIB_R94C78:CIB_DCU2"].add_unknown(85, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(20, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(22, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(29, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(31, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(74, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(76, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(83, 10); + cc.tiles["CIB_R94C79:CIB_DCUG"].add_unknown(85, 10); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA5MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JA6MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB5MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JB6MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JC3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JC4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JC5MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JD3MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JD4MUX", "0"); + cc.tiles["CIB_R94C7:CIB_EFB1"].add_enum("CIB.JD5MUX", "0"); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(20, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(22, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(29, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(31, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(74, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(76, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(83, 10); + cc.tiles["CIB_R94C80:CIB_DCUH"].add_unknown(85, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(20, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(22, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(29, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(31, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(74, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(76, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(83, 10); + cc.tiles["CIB_R94C81:CIB_DCUI"].add_unknown(85, 10); + cc.tiles["CIB_R94C82:CIB_DCU1"].add_unknown(20, 10); + cc.tiles["CIB_R94C82:CIB_DCU1"].add_unknown(22, 10); + cc.tiles["CIB_R94C82:CIB_DCU1"].add_unknown(29, 10); + cc.tiles["CIB_R94C82:CIB_DCU1"].add_unknown(31, 10); + cc.tiles["CIB_R94C82:CIB_DCU1"].add_unknown(74, 10); + cc.tiles["MIB_R22C67:CMUX_UL_0"].add_arc("G_DCS0CLK0", "G_VPFN0000"); + cc.tiles["MIB_R22C68:CMUX_UR_0"].add_arc("G_DCS0CLK1", "G_VPFN0000"); + cc.tiles["MIB_R70C67:CMUX_LL_0"].add_arc("G_DCS1CLK0", "G_VPFN0000"); + cc.tiles["MIB_R70C68:CMUX_LR_0"].add_arc("G_DCS1CLK1", "G_VPFN0000"); + cc.tiles["MIB_R95C101:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C102:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C103:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C104:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C105:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C106:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C107:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C108:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C110:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C111:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C112:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C113:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C114:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C115:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C116:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C117:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C119:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C120:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C121:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C122:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(54, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(56, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(82, 1); + cc.tiles["MIB_R95C4:EFB0_PICB0"].add_unknown(94, 1); + cc.tiles["MIB_R95C96:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C97:PICB1"].add_unknown(0, 1); + cc.tiles["MIB_R95C98:PICB0"].add_unknown(0, 1); + cc.tiles["MIB_R95C99:PICB1"].add_unknown(0, 1); +} + +} // namespace BaseConfigs +NEXTPNR_NAMESPACE_END diff --git a/ecp5/bitstream.cc b/ecp5/bitstream.cc index df16946d..a9c82524 100644 --- a/ecp5/bitstream.cc +++ b/ecp5/bitstream.cc @@ -34,6 +34,18 @@ NEXTPNR_NAMESPACE_BEGIN +namespace BaseConfigs { +void config_empty_lfe5u_25f(ChipConfig &cc); +void config_empty_lfe5u_45f(ChipConfig &cc); +void config_empty_lfe5u_85f(ChipConfig &cc); +void config_empty_lfe5um_25f(ChipConfig &cc); +void config_empty_lfe5um_45f(ChipConfig &cc); +void config_empty_lfe5um_85f(ChipConfig &cc); +void config_empty_lfe5um5g_25f(ChipConfig &cc); +void config_empty_lfe5um5g_45f(ChipConfig &cc); +void config_empty_lfe5um5g_85f(ChipConfig &cc); +} // namespace BaseConfigs + // Convert an absolute wire name to a relative Trellis one static std::string get_trellis_wirename(Context *ctx, Location loc, WireId wire) { @@ -538,8 +550,37 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex } config_file >> cc; } else { - cc.chip_name = ctx->getChipName(); - // TODO: .bit metadata + switch (ctx->args.type) { + case ArchArgs::LFE5U_25F: + BaseConfigs::config_empty_lfe5u_25f(cc); + break; + case ArchArgs::LFE5U_45F: + BaseConfigs::config_empty_lfe5u_45f(cc); + break; + case ArchArgs::LFE5U_85F: + BaseConfigs::config_empty_lfe5u_85f(cc); + break; + case ArchArgs::LFE5UM_25F: + BaseConfigs::config_empty_lfe5um_25f(cc); + break; + case ArchArgs::LFE5UM_45F: + BaseConfigs::config_empty_lfe5um_45f(cc); + break; + case ArchArgs::LFE5UM_85F: + BaseConfigs::config_empty_lfe5um_85f(cc); + break; + case ArchArgs::LFE5UM5G_25F: + BaseConfigs::config_empty_lfe5um5g_25f(cc); + break; + case ArchArgs::LFE5UM5G_45F: + BaseConfigs::config_empty_lfe5um5g_45f(cc); + break; + case ArchArgs::LFE5UM5G_85F: + BaseConfigs::config_empty_lfe5um5g_85f(cc); + break; + default: + NPNR_ASSERT_FALSE("Unsupported device type"); + } } // Clear out DCU tieoffs in base config if DCU used @@ -578,7 +619,7 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex } // Find bank voltages std::unordered_map<int, IOVoltage> bankVcc; - std::unordered_map<int, bool> bankLvds; + std::unordered_map<int, bool> bankLvds, bankVref; for (auto &cell : ctx->cells) { CellInfo *ci = cell.second.get(); @@ -587,7 +628,7 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex std::string dir = str_or_default(ci->params, ctx->id("DIR"), "INPUT"); std::string iotype = str_or_default(ci->attrs, ctx->id("IO_TYPE"), "LVCMOS33"); - if (dir != "INPUT") { + if (dir != "INPUT" || is_referenced(ioType_from_str(iotype))) { IOVoltage vcc = get_vccio(ioType_from_str(iotype)); if (bankVcc.find(bank) != bankVcc.end()) { // TODO: strong and weak constraints @@ -603,6 +644,8 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex if (iotype == "LVDS") bankLvds[bank] = true; + if ((dir == "INPUT" || dir == "BIDIR") && is_referenced(ioType_from_str(iotype))) + bankVref[bank] = true; } } @@ -614,17 +657,67 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex std::string type = tile.second; if (type.find("BANKREF") != std::string::npos && type != "BANKREF8") { int bank = std::stoi(type.substr(7)); - if (bankVcc.find(bank) != bankVcc.end()) - cc.tiles[tile.first].add_enum("BANK.VCCIO", iovoltage_to_str(bankVcc[bank])); + if (bankVcc.find(bank) != bankVcc.end()) { + if (bankVcc[bank] == IOVoltage::VCC_1V35) + cc.tiles[tile.first].add_enum("BANK.VCCIO", "1V2"); + else + cc.tiles[tile.first].add_enum("BANK.VCCIO", iovoltage_to_str(bankVcc[bank])); + } if (bankLvds[bank]) { cc.tiles[tile.first].add_enum("BANK.DIFF_REF", "ON"); cc.tiles[tile.first].add_enum("BANK.LVDSO", "ON"); } + if (bankVref[bank]) { + cc.tiles[tile.first].add_enum("BANK.DIFF_REF", "ON"); + cc.tiles[tile.first].add_enum("BANK.VREF", "ON"); + } } } } } + // Create dummy outputs used as Vref input buffer for banks where Vref is used + for (auto bv : bankVref) { + if (!bv.second) + continue; + BelId vrefIO = ctx->getPioByFunctionName(fmt_str("VREF1_" << bv.first)); + if (vrefIO == BelId()) + log_error("unable to find VREF input for bank %d\n", bv.first); + if (!ctx->checkBelAvail(vrefIO)) { + CellInfo *bound = ctx->getBoundBelCell(vrefIO); + if (bound != nullptr) + log_error("VREF pin %s of bank %d is occupied by IO '%s'\n", ctx->getBelPackagePin(vrefIO).c_str(), + bv.first, bound->name.c_str(ctx)); + else + log_error("VREF pin %s of bank %d is unavailable\n", ctx->getBelPackagePin(vrefIO).c_str(), bv.first); + } + log_info("Using pin %s as VREF for bank %d\n", ctx->getBelPackagePin(vrefIO).c_str(), bv.first); + std::string pio_tile = get_pio_tile(ctx, vrefIO); + + std::string iotype; + switch (bankVcc[bv.first]) { + case IOVoltage::VCC_1V2: + iotype = "HSUL12"; + break; + case IOVoltage::VCC_1V35: + iotype = "SSTL18_I"; + break; + case IOVoltage::VCC_1V5: + iotype = "SSTL18_I"; + break; + case IOVoltage::VCC_1V8: + iotype = "SSTL18_I"; + break; + default: + log_error("Referenced inputs are not supported with bank VccIO of %s.\n", + iovoltage_to_str(bankVcc[bv.first]).c_str()); + } + + std::string pio = ctx->locInfo(vrefIO)->bel_data[vrefIO.index].name.get(); + cc.tiles[pio_tile].add_enum(pio + ".BASE_TYPE", "OUTPUT_" + iotype); + cc.tiles[pio_tile].add_enum(pio + ".PULLMODE", "NONE"); + } + // Configure slices for (auto &cell : ctx->cells) { CellInfo *ci = cell.second.get(); @@ -727,9 +820,13 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex // cc.tiles[pic_tile].add_enum(other + ".BASE_TYPE", "_NONE_"); cc.tiles[pio_tile].add_enum(other + ".PULLMODE", "NONE"); cc.tiles[pio_tile].add_enum(pio + ".PULLMODE", "NONE"); + } else if (is_referenced(ioType_from_str(iotype))) { + cc.tiles[pio_tile].add_enum(pio + ".PULLMODE", "NONE"); } if (dir != "INPUT" && - (ci->ports.find(ctx->id("T")) == ci->ports.end() || ci->ports.at(ctx->id("T")).net == nullptr)) { + (ci->ports.find(ctx->id("T")) == ci->ports.end() || ci->ports.at(ctx->id("T")).net == nullptr) && + (ci->ports.find(ctx->id("IOLTO")) == ci->ports.end() || + ci->ports.at(ctx->id("IOLTO")).net == nullptr)) { // Tie tristate low if unconnected for outputs or bidir std::string jpt = fmt_str("X" << bel.location.x << "/Y" << bel.location.y << "/JPADDT" << pio.back()); WireId jpt_wire = ctx->getWireByName(ctx->id(jpt)); @@ -740,11 +837,43 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex std::string cib_wirename = ctx->locInfo(cib_wire)->wire_data[cib_wire.index].name.get(); cc.tiles[cib_tile].add_enum("CIB." + cib_wirename + "MUX", "0"); } - if (dir == "INPUT" && !is_differential(ioType_from_str(iotype))) { + if (dir == "INPUT" && !is_differential(ioType_from_str(iotype)) && + !is_referenced(ioType_from_str(iotype))) { cc.tiles[pio_tile].add_enum(pio + ".HYSTERESIS", "ON"); } - if (ci->attrs.count(ctx->id("SLEWRATE"))) + if (ci->attrs.count(ctx->id("SLEWRATE")) && !is_referenced(ioType_from_str(iotype))) cc.tiles[pio_tile].add_enum(pio + ".SLEWRATE", str_or_default(ci->attrs, ctx->id("SLEWRATE"), "SLOW")); + if (ci->attrs.count(ctx->id("PULLMODE"))) + cc.tiles[pio_tile].add_enum(pio + ".PULLMODE", str_or_default(ci->attrs, ctx->id("PULLMODE"), "NONE")); + if (ci->attrs.count(ctx->id("DIFFRESISTOR"))) + cc.tiles[pio_tile].add_enum(pio + ".DIFFRESISTOR", + str_or_default(ci->attrs, ctx->id("DIFFRESISTOR"), "OFF")); + if (ci->attrs.count(ctx->id("TERMINATION"))) { + auto vccio = get_vccio(ioType_from_str(iotype)); + switch (vccio) { + case IOVoltage::VCC_1V8: + cc.tiles[pio_tile].add_enum(pio + ".TERMINATION_1V8", + str_or_default(ci->attrs, ctx->id("TERMINATION"), "OFF")); + break; + case IOVoltage::VCC_1V5: + cc.tiles[pio_tile].add_enum(pio + ".TERMINATION_1V5", + str_or_default(ci->attrs, ctx->id("TERMINATION"), "OFF")); + break; + case IOVoltage::VCC_1V35: + cc.tiles[pio_tile].add_enum(pio + ".TERMINATION_1V35", + str_or_default(ci->attrs, ctx->id("TERMINATION"), "OFF")); + break; + default: + log_error("TERMINATION is not supported with Vcc = %s (on PIO %s)\n", + iovoltage_to_str(vccio).c_str(), ci->name.c_str(ctx)); + } + } + std::string datamux_oddr = str_or_default(ci->params, ctx->id("DATAMUX_ODDR"), "PADDO"); + if (datamux_oddr != "PADDO") + cc.tiles[pic_tile].add_enum(pio + ".DATAMUX_ODDR", datamux_oddr); + std::string datamux_mddr = str_or_default(ci->params, ctx->id("DATAMUX_MDDR"), "PADDO"); + if (datamux_mddr != "PADDO") + cc.tiles[pic_tile].add_enum(pio + ".DATAMUX_MDDR", datamux_mddr); } else if (ci->type == ctx->id("DCCA")) { // Nothing to do } else if (ci->type == ctx->id("DP16KD")) { @@ -1078,6 +1207,18 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex int_to_bitvector(int_or_default(ci->attrs, ctx->id("MFG_ENABLE_FILTEROPAMP"), 0), 1)); cc.tilegroups.push_back(tg); + } else if (ci->type == id_IOLOGIC || ci->type == id_SIOLOGIC) { + Loc pio_loc = ctx->getBelLocation(ci->bel); + pio_loc.z -= ci->type == id_SIOLOGIC ? 2 : 4; + std::string pic_tile = get_pic_tile(ctx, ctx->getBelByLocation(pio_loc)); + std::string prim = std::string("IOLOGIC") + "ABCD"[pio_loc.z]; + for (auto ¶m : ci->params) { + if (param.first == ctx->id("DELAY.DEL_VALUE")) + cc.tiles[pic_tile].add_word(prim + "." + param.first.str(ctx), + int_to_bitvector(std::stoi(param.second), 7)); + else + cc.tiles[pic_tile].add_enum(prim + "." + param.first.str(ctx), param.second); + } } else if (ci->type == id_DCUA) { TileGroup tg; tg.tiles = get_dcu_tiles(ctx, ci->bel); @@ -1100,6 +1241,85 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex std::string tname = ctx->getTileByTypeAndLocation(loc.y + 1, loc.x, "BMID_0H"); cc.tiles[tname].add_enum("PCSCLKDIV" + std::to_string(loc.z), str_or_default(ci->params, ctx->id("GSR"), "ENABLED")); + } else if (ci->type == id_DTR) { + cc.tiles[ctx->getTileByType("DTR")].add_enum("DTR.MODE", "DTR"); + } else if (ci->type == id_OSCG) { + int div = int_or_default(ci->params, ctx->id("DIV"), 128); + if (div == 128) + div = 127; + cc.tiles[ctx->getTileByType("EFB0_PICB0")].add_enum("OSC.DIV", std::to_string(div)); + cc.tiles[ctx->getTileByType("EFB1_PICB1")].add_enum("OSC.DIV", std::to_string(div)); + cc.tiles[ctx->getTileByType("EFB1_PICB1")].add_enum("OSC.MODE", "OSCG"); + cc.tiles[ctx->getTileByType("EFB1_PICB1")].add_enum("CCLK.MODE", "_NONE_"); + } else if (ci->type == id_USRMCLK) { + cc.tiles[ctx->getTileByType("EFB3_PICB1")].add_enum("CCLK.MODE", "USRMCLK"); + } else if (ci->type == id_GSR) { + cc.tiles[ctx->getTileByType("EFB0_PICB0")].add_enum( + "GSR.GSRMODE", str_or_default(ci->params, ctx->id("MODE"), "ACTIVE_HIGH")); + cc.tiles[ctx->getTileByType("VIQ_BUF")].add_enum("GSR.SYNCMODE", + str_or_default(ci->params, ctx->id("SYNCMODE"), "ASYNC")); + } else if (ci->type == id_JTAGG) { + cc.tiles[ctx->getTileByType("EFB0_PICB0")].add_enum("JTAG.ER1", + str_or_default(ci->params, ctx->id("ER1"), "ENABLED")); + cc.tiles[ctx->getTileByType("EFB0_PICB0")].add_enum("JTAG.ER2", + str_or_default(ci->params, ctx->id("ER2"), "ENABLED")); + } else if (ci->type == id_CLKDIVF) { + Loc loc = ctx->getBelLocation(ci->bel); + bool r = loc.x > 5; + std::string clkdiv = std::string("CLKDIV_") + (r ? "R" : "L") + std::to_string(loc.z); + std::string tile = ctx->getTileByType(std::string("ECLK_") + (r ? "R" : "L")); + cc.tiles[tile].add_enum(clkdiv + ".DIV", str_or_default(ci->params, ctx->id("DIV"), "2.0")); + cc.tiles[tile].add_enum(clkdiv + ".GSR", str_or_default(ci->params, ctx->id("GSR"), "DISABLED")); + } else if (ci->type == id_TRELLIS_ECLKBUF) { + } else if (ci->type == id_DQSBUFM) { + Loc loc = ctx->getBelLocation(ci->bel); + bool l = loc.x < 10; + std::string pic = l ? "PICL" : "PICR"; + TileGroup tg; + tg.tiles.push_back(ctx->getTileByTypeAndLocation(loc.y - 2, loc.x, pic + "1_DQS0")); + tg.tiles.push_back(ctx->getTileByTypeAndLocation(loc.y - 1, loc.x, pic + "2_DQS1")); + tg.tiles.push_back(ctx->getTileByTypeAndLocation(loc.y, loc.x, pic + "0_DQS2")); + tg.tiles.push_back(ctx->getTileByTypeAndLocation(loc.y + 1, loc.x, pic + "1_DQS3")); + tg.config.add_enum("DQS.MODE", "DQSBUFM"); + tg.config.add_enum("DQS.DQS_LI_DEL_ADJ", str_or_default(ci->params, ctx->id("DQS_LI_DEL_ADJ"), "PLUS")); + tg.config.add_enum("DQS.DQS_LO_DEL_ADJ", str_or_default(ci->params, ctx->id("DQS_LO_DEL_ADJ"), "PLUS")); + int li_del_value = int_or_default(ci->params, ctx->id("DQS_LI_DEL_VAL"), 0); + if (str_or_default(ci->params, ctx->id("DQS_LI_DEL_ADJ"), "PLUS") == "MINUS") + li_del_value = (256 - li_del_value) & 0xFF; + int lo_del_value = int_or_default(ci->params, ctx->id("DQS_LO_DEL_VAL"), 0); + if (str_or_default(ci->params, ctx->id("DQS_LO_DEL_ADJ"), "PLUS") == "MINUS") + lo_del_value = (256 - lo_del_value) & 0xFF; + tg.config.add_word("DQS.DQS_LI_DEL_VAL", int_to_bitvector(li_del_value, 8)); + tg.config.add_word("DQS.DQS_LO_DEL_VAL", int_to_bitvector(lo_del_value, 8)); + tg.config.add_enum("DQS.WRLOADN_USED", get_net_or_empty(ci, id_WRLOADN) != nullptr ? "YES" : "NO"); + tg.config.add_enum("DQS.RDLOADN_USED", get_net_or_empty(ci, id_RDLOADN) != nullptr ? "YES" : "NO"); + tg.config.add_enum("DQS.PAUSE_USED", get_net_or_empty(ci, id_PAUSE) != nullptr ? "YES" : "NO"); + tg.config.add_enum("DQS.READ_USED", + (get_net_or_empty(ci, id_READ0) != nullptr || get_net_or_empty(ci, id_READ1) != nullptr) + ? "YES" + : "NO"); + tg.config.add_enum("DQS.DDRDEL", get_net_or_empty(ci, id_DDRDEL) != nullptr ? "DDRDEL" : "0"); + tg.config.add_enum("DQS.GSR", str_or_default(ci->params, ctx->id("GSR"), "DISABLED")); + cc.tilegroups.push_back(tg); + } else if (ci->type == id_ECLKSYNCB) { + Loc loc = ctx->getBelLocation(ci->bel); + bool r = loc.x > 5; + std::string eclksync = ctx->locInfo(bel)->bel_data[bel.index].name.get(); + std::string tile = ctx->getTileByType(std::string("ECLK_") + (r ? "R" : "L")); + if (get_net_or_empty(ci, id_STOP) != nullptr) + cc.tiles[tile].add_enum(eclksync + ".MODE", "ECLKSYNCB"); + } else if (ci->type == id_DDRDLL) { + Loc loc = ctx->getBelLocation(ci->bel); + bool u = loc.y<15, r = loc.x> 15; + std::string tiletype = fmt_str("DDRDLL_" << (u ? 'U' : 'L') << (r ? 'R' : 'L')); + if (ctx->args.type == ArchArgs::LFE5U_25F || ctx->args.type == ArchArgs::LFE5UM_25F || + ctx->args.type == ArchArgs::LFE5UM5G_25F) + tiletype += "A"; + std::string tile = ctx->getTileByType(tiletype); + cc.tiles[tile].add_enum("DDRDLL.MODE", "DDRDLLA"); + cc.tiles[tile].add_enum("DDRDLL.GSR", str_or_default(ci->params, ctx->id("GSR"), "DISABLED")); + cc.tiles[tile].add_enum("DDRDLL.FORCE_MAX_DELAY", + str_or_default(ci->params, ctx->id("FORCE_MAX_DELAY"), "NO")); } else { NPNR_ASSERT_FALSE("unsupported cell type"); } diff --git a/ecp5/cells.cc b/ecp5/cells.cc index 31839ee4..38bcc17c 100644 --- a/ecp5/cells.cc +++ b/ecp5/cells.cc @@ -41,6 +41,22 @@ std::unique_ptr<CellInfo> create_ecp5_cell(Context *ctx, IdString type, std::str new_cell->name = ctx->id(name); } new_cell->type = type; + + auto copy_bel_ports = [&]() { + // First find a Bel of the target type + BelId tgt; + for (auto bel : ctx->getBels()) { + if (ctx->getBelType(bel) == type) { + tgt = bel; + break; + } + } + NPNR_ASSERT(tgt != BelId()); + for (auto port : ctx->getBelPins(tgt)) { + add_port(ctx, new_cell.get(), port.str(ctx), ctx->getBelPinType(tgt, port)); + } + }; + if (type == ctx->id("TRELLIS_SLICE")) { new_cell->params[ctx->id("MODE")] = "LOGIC"; new_cell->params[ctx->id("GSR")] = "DISABLED"; @@ -111,11 +127,17 @@ std::unique_ptr<CellInfo> create_ecp5_cell(Context *ctx, IdString type, std::str } else if (type == ctx->id("TRELLIS_IO")) { new_cell->params[ctx->id("DIR")] = "INPUT"; new_cell->attrs[ctx->id("IO_TYPE")] = "LVCMOS33"; + new_cell->params[ctx->id("DATAMUX_ODDR")] = "PADDO"; + new_cell->params[ctx->id("DATAMUX_MDDR")] = "PADDO"; add_port(ctx, new_cell.get(), "B", PORT_INOUT); add_port(ctx, new_cell.get(), "I", PORT_IN); add_port(ctx, new_cell.get(), "T", PORT_IN); add_port(ctx, new_cell.get(), "O", PORT_OUT); + + add_port(ctx, new_cell.get(), "IOLDO", PORT_IN); + add_port(ctx, new_cell.get(), "IOLTO", PORT_IN); + } else if (type == ctx->id("LUT4")) { new_cell->params[ctx->id("INIT")] = "0"; @@ -150,6 +172,38 @@ std::unique_ptr<CellInfo> create_ecp5_cell(Context *ctx, IdString type, std::str add_port(ctx, new_cell.get(), "CLKI", PORT_IN); add_port(ctx, new_cell.get(), "CLKO", PORT_OUT); add_port(ctx, new_cell.get(), "CE", PORT_IN); + } else if (type == id_IOLOGIC || type == id_SIOLOGIC) { + new_cell->params[ctx->id("MODE")] = "NONE"; + new_cell->params[ctx->id("GSR")] = "DISABLED"; + new_cell->params[ctx->id("CLKIMUX")] = "CLK"; + new_cell->params[ctx->id("CLKOMUX")] = "CLK"; + new_cell->params[ctx->id("LSRIMUX")] = "0"; + new_cell->params[ctx->id("LSROMUX")] = "0"; + new_cell->params[ctx->id("LSRMUX")] = "LSR"; + + new_cell->params[ctx->id("DELAY.OUTDEL")] = "DISABLED"; + new_cell->params[ctx->id("DELAY.DEL_VALUE")] = "0"; + new_cell->params[ctx->id("DELAY.WAIT_FOR_EDGE")] = "DISABLED"; + + if (type == id_IOLOGIC) { + new_cell->params[ctx->id("IDDRXN.MODE")] = "NONE"; + new_cell->params[ctx->id("ODDRXN.MODE")] = "NONE"; + + new_cell->params[ctx->id("MIDDRX.MODE")] = "NONE"; + new_cell->params[ctx->id("MODDRX.MODE")] = "NONE"; + new_cell->params[ctx->id("MTDDRX.MODE")] = "NONE"; + + new_cell->params[ctx->id("IOLTOMUX")] = "NONE"; + new_cell->params[ctx->id("MTDDRX.DQSW_INVERT")] = "DISABLED"; + new_cell->params[ctx->id("MTDDRX.REGSET")] = "RESET"; + + new_cell->params[ctx->id("MIDDRX_MODDRX.WRCLKMUX")] = "NONE"; + } + // Just copy ports from the Bel + copy_bel_ports(); + } else if (type == id_TRELLIS_ECLKBUF) { + add_port(ctx, new_cell.get(), "ECLKI", PORT_IN); + add_port(ctx, new_cell.get(), "ECLKO", PORT_OUT); } else { log_error("unable to create ECP5 cell of type %s", type.c_str(ctx)); } @@ -365,7 +419,7 @@ void nxio_to_tr(Context *ctx, CellInfo *nxio, CellInfo *trio, std::vector<std::u ctx, donet, [](const Context *ctx, const CellInfo *cell) { return cell->type == ctx->id("$_TBUF_"); }, ctx->id("Y")); if (tbuf) { - replace_port(tbuf, ctx->id("I"), trio, ctx->id("I")); + replace_port(tbuf, ctx->id("A"), trio, ctx->id("I")); // Need to invert E to form T std::unique_ptr<CellInfo> inv_lut = create_ecp5_cell(ctx, ctx->id("LUT4"), trio->name.str(ctx) + "$invert_T"); replace_port(tbuf, ctx->id("E"), inv_lut.get(), ctx->id("A")); diff --git a/ecp5/cells.h b/ecp5/cells.h index dcef99e3..e66f8f21 100644 --- a/ecp5/cells.h +++ b/ecp5/cells.h @@ -46,6 +46,17 @@ inline bool is_pfumx(const BaseCtx *ctx, const CellInfo *cell) { return cell->ty inline bool is_l6mux(const BaseCtx *ctx, const CellInfo *cell) { return cell->type == ctx->id("L6MUX21"); } +inline bool is_iologic_input_cell(const BaseCtx *ctx, const CellInfo *cell) +{ + return cell->type == ctx->id("IDDRX1F") || cell->type == ctx->id("IDDRX2F") || cell->type == ctx->id("IDDR71B") || + cell->type == ctx->id("IDDRX2DQA"); +} +inline bool is_iologic_output_cell(const BaseCtx *ctx, const CellInfo *cell) +{ + return cell->type == ctx->id("ODDRX1F") || cell->type == ctx->id("ODDRX2F") || cell->type == ctx->id("ODDR71B") || + cell->type == ctx->id("ODDRX2DQA") || cell->type == ctx->id("ODDRX2DQSB") || cell->type == ctx->id("OSHX2A"); +} + void ff_to_slice(Context *ctx, CellInfo *ff, CellInfo *lc, int index, bool driven_by_lut); void lut_to_slice(Context *ctx, CellInfo *lut, CellInfo *lc, int index); void ccu2c_to_slice(Context *ctx, CellInfo *ccu, CellInfo *lc); diff --git a/ecp5/constids.inc b/ecp5/constids.inc index 250bc3fc..8a3179b6 100644 --- a/ecp5/constids.inc +++ b/ecp5/constids.inc @@ -1115,7 +1115,6 @@ X(SEL2) X(SEL1) X(SEL0) X(CDIV1) -X(CDIVX) X(DP16KD_REGMODE_A_NOREG_REGMODE_B_NOREG) X(DP16KD_REGMODE_A_NOREG_REGMODE_B_OUTREG) @@ -1142,3 +1141,144 @@ X(PAD) X(PADDI) X(PADDO) X(PADDT) + +X(IOLOGIC) +X(SIOLOGIC) +X(DI) +X(IOLDO) +X(IOLDOD) +X(IOLDOI) +X(IOLTO) +X(INDD) +X(LOADN) +X(MOVE) +X(DIRECTION) +X(TSDATA0) +X(TXDATA0) +X(TXDATA1) +X(RXDATA0) +X(RXDATA1) +X(INFF) +X(CFLAG) +X(ECLK) +X(TSDATA1) +X(TXDATA2) +X(TXDATA3) +X(RXDATA2) +X(RXDATA3) +X(TXDATA4) +X(TXDATA5) +X(TXDATA6) +X(RXDATA4) +X(RXDATA5) +X(RXDATA6) +X(DQSR90) +X(DQSW270) +X(DQSW) +X(RDPNTR0) +X(RDPNTR1) +X(RDPNTR2) +X(WRPNTR0) +X(WRPNTR1) +X(WRPNTR2) + +X(GSR) + +X(JTAGG) +X(TCK) +X(TMS) +X(TDI) +X(JTDO2) +X(JTDO1) +X(TDO) +X(JTDI) +X(JTCK) +X(JRTI2) +X(JRTI1) +X(JSHIFT) +X(JUPDATE) +X(JRSTN) +X(JCE2) +X(JCE1) + +X(OSCG) +X(OSC) +X(SEDSTDBY) + +X(SEDGA) +X(SEDENABLE) +X(SEDSTART) +X(SEDFRCERR) +X(SEDDONE) +X(SEDINPROG) +X(SEDERR) + +X(DTR) +X(STARTPULSE) +X(DTROUT0) +X(DTROUT1) +X(DTROUT2) +X(DTROUT3) +X(DTROUT4) +X(DTROUT5) +X(DTROUT6) +X(DTROUT7) + +X(USRMCLK) + +X(CLKDIVF) +X(ALIGNWD) +X(CDIVX) + +X(ECLKSYNCB) +X(ECLKI) +X(STOP) +X(ECLKO) + +X(DLLDELD) +X(A) +X(DDRDEL) +X(Z) + +X(DDRDLL) +X(UDDCNTLN) +X(FREEZE) +X(DIVOSC) +X(DCNTL0) +X(DCNTL1) +X(DCNTL2) +X(DCNTL3) +X(DCNTL4) +X(DCNTL5) +X(DCNTL6) +X(DCNTL7) + +X(DQSBUFM) +X(DQSI) +X(READ1) +X(READ0) +X(READCLKSEL2) +X(READCLKSEL1) +X(READCLKSEL0) +X(DYNDELAY0) +X(DYNDELAY1) +X(DYNDELAY2) +X(DYNDELAY3) +X(DYNDELAY4) +X(DYNDELAY5) +X(DYNDELAY6) +X(DYNDELAY7) +X(PAUSE) +X(RDLOADN) +X(RDMOVE) +X(RDDIRECTION) +X(WRLOADN) +X(WRMOVE) +X(WRDIRECTION) +X(DATAVALID) +X(BURSTDET) +X(RDCFLAG) +X(WRCFLAG) +X(SCLK) + +X(TRELLIS_ECLKBUF)
\ No newline at end of file diff --git a/ecp5/docs/primitives.md b/ecp5/docs/primitives.md new file mode 100644 index 00000000..aa37f3e5 --- /dev/null +++ b/ecp5/docs/primitives.md @@ -0,0 +1,47 @@ +# nextpnr-ecp5 Primitive Support List + +nextpnr-ecp5 currently supports the following primitives: + + - **ALU54B** (limited support, must be manually placed) + - **CCU2C** + - **CLKDIVF** + - **DCUA** + - **DDRDLLA** + - **DELAYF** + - **DELAYG** + - **DP16KD** + - **DQSBUFM** + - **DTR** + - **ECLKSYNCB** + - **EHXPLLL** + - **EXTREFB** + - **GSR** + - **IDDR71B** + - **IDDRX1F** + - **IDDRX2DQA** + - **IDDRX2F** + - **IOLOGIC** + - **JTAGG** (untested) + - **L6MUX21** + - **LUT4** + - **MULT18X18D** (cascade functionality not supported) + - **ODDR71B** + - **ODDRX1F** + - **ODDRX2DQA** + - **ODDRX2DQSB** + - **ODDRX2F** + - **OSCG** + - **OSHX2A** + - **PCSCLKDIV** + - **PFUMX** + - **SEDGA** (untested) + - **SIOLOGIC** + - **TRELLIS_DPR16X4** + - **TRELLIS_ECLKBUF** + - **TRELLIS_FF** + - **TRELLIS_IO** + - **TRELLIS_SLICE** + - **TSHX2DQA** + - **TSHX2DQSA** + - **USRMCLK** (untested) + diff --git a/ecp5/family.cmake b/ecp5/family.cmake index 1aae2bea..ca7dc9e9 100644 --- a/ecp5/family.cmake +++ b/ecp5/family.cmake @@ -1,70 +1,78 @@ +if (NOT EXTERNAL_CHIPDB) + set(devices 25k 45k 85k) -set(devices 25k 45k 85k) - -if (NOT DEFINED TRELLIS_ROOT) - message(FATAL_ERROR "you must define TRELLIS_ROOT using -DTRELLIS_ROOT=/path/to/prjtrellis for ECP5 support") -endif() + if (NOT DEFINED TRELLIS_ROOT) + message(STATUS "TRELLIS_ROOT not defined using -DTRELLIS_ROOT=/path/to/prjtrellis. Default to /usr/local/share/trellis") + set(TRELLIS_ROOT "/usr/local/share/trellis") + endif() + if (NOT DEFINED PYTRELLIS_LIBDIR) + find_library(PYTRELLIS pytrellis.so + PATHS ${TRELLIS_ROOT}/libtrellis + PATH_SUFFIXES trellis + DOC "Location of pytrellis library") -file( GLOB found_pytrellis ${TRELLIS_ROOT}/libtrellis/pytrellis.*) + if ("${PYTRELLIS}" STREQUAL "PYTRELLIS-NOTFOUND") + message(FATAL_ERROR "Failed to locate pytrellis library!") + endif() -if ("${found_pytrellis}" STREQUAL "") - message(FATAL_ERROR "failed to find pytrellis library in ${TRELLIS_ROOT}/libtrellis/") -endif() + get_filename_component(PYTRELLIS_LIBDIR ${PYTRELLIS} DIRECTORY) + endif() -set(DB_PY ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/trellis_import.py) + set(DB_PY ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/trellis_import.py) -file(MAKE_DIRECTORY ecp5/chipdbs/) -add_library(ecp5_chipdb OBJECT ecp5/chipdbs/) -target_compile_definitions(ecp5_chipdb PRIVATE NEXTPNR_NAMESPACE=nextpnr_${family}) -target_include_directories(ecp5_chipdb PRIVATE ${family}/) + file(MAKE_DIRECTORY ecp5/chipdbs/) + add_library(ecp5_chipdb OBJECT ecp5/chipdbs/) + target_compile_definitions(ecp5_chipdb PRIVATE NEXTPNR_NAMESPACE=nextpnr_${family}) + target_include_directories(ecp5_chipdb PRIVATE ${family}/) -if (WIN32) -set(ENV_CMD ${CMAKE_COMMAND} -E env "PYTHONPATH=\"${TRELLIS_ROOT}/libtrellis\;${TRELLIS_ROOT}/util/common\;${TRELLIS_ROOT}/timing/util\"") -else() -set(ENV_CMD ${CMAKE_COMMAND} -E env "PYTHONPATH=${TRELLIS_ROOT}/libtrellis:${TRELLIS_ROOT}/util/common:${TRELLIS_ROOT}/timing/util") -endif() + if (CMAKE_HOST_WIN32) + set(ENV_CMD ${CMAKE_COMMAND} -E env "PYTHONPATH=\"${PYTRELLIS_LIBDIR}\;${TRELLIS_ROOT}/util/common\;${TRELLIS_ROOT}/timing/util\"") + else() + set(ENV_CMD ${CMAKE_COMMAND} -E env "PYTHONPATH=${PYTRELLIS_LIBDIR}\:${TRELLIS_ROOT}/util/common:${TRELLIS_ROOT}/timing/util") + endif() -if (MSVC) - target_sources(ecp5_chipdb PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resource/embed.cc) - set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resources/chipdb.rc PROPERTIES LANGUAGE RC) - foreach (dev ${devices}) - set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bin) - set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bba) - set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/constids.inc) - add_custom_command(OUTPUT ${DEV_CC_BBA_DB} - COMMAND ${ENV_CMD} python3 ${DB_PY} -p ${DEV_CONSTIDS_INC} ${dev} > ${DEV_CC_BBA_DB} + if (MSVC) + target_sources(ecp5_chipdb PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resource/embed.cc) + set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resources/chipdb.rc PROPERTIES LANGUAGE RC) + foreach (dev ${devices}) + set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bin) + set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bba) + set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/constids.inc) + add_custom_command(OUTPUT ${DEV_CC_BBA_DB} + COMMAND ${ENV_CMD} python3 ${DB_PY} -p ${DEV_CONSTIDS_INC} ${dev} > ${DEV_CC_BBA_DB} DEPENDS ${DB_PY} ) - add_custom_command(OUTPUT ${DEV_CC_DB} + add_custom_command(OUTPUT ${DEV_CC_DB} COMMAND bbasm ${DEV_CC_BBA_DB} ${DEV_CC_DB} DEPENDS bbasm ${DEV_CC_BBA_DB} ) - target_sources(ecp5_chipdb PRIVATE ${DEV_CC_DB}) - set_source_files_properties(${DEV_CC_DB} PROPERTIES HEADER_FILE_ONLY TRUE) - foreach (target ${family_targets}) - target_sources(${target} PRIVATE $<TARGET_OBJECTS:ecp5_chipdb> ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resource/chipdb.rc) - endforeach (target) - endforeach (dev) -else() - target_compile_options(ecp5_chipdb PRIVATE -g0 -O0 -w) - foreach (dev ${devices}) - set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.cc) - set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bba) - set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/constids.inc) - add_custom_command(OUTPUT ${DEV_CC_BBA_DB} - COMMAND ${ENV_CMD} python3 ${DB_PY} -p ${DEV_CONSTIDS_INC} ${dev} > ${DEV_CC_BBA_DB}.new + target_sources(ecp5_chipdb PRIVATE ${DEV_CC_DB}) + set_source_files_properties(${DEV_CC_DB} PROPERTIES HEADER_FILE_ONLY TRUE) + foreach (target ${family_targets}) + target_sources(${target} PRIVATE $<TARGET_OBJECTS:ecp5_chipdb> ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/resource/chipdb.rc) + endforeach (target) + endforeach (dev) + else() + target_compile_options(ecp5_chipdb PRIVATE -g0 -O0 -w) + foreach (dev ${devices}) + set(DEV_CC_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.cc) + set(DEV_CC_BBA_DB ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/chipdbs/chipdb-${dev}.bba) + set(DEV_CONSTIDS_INC ${CMAKE_CURRENT_SOURCE_DIR}/ecp5/constids.inc) + add_custom_command(OUTPUT ${DEV_CC_BBA_DB} + COMMAND ${ENV_CMD} python3 ${DB_PY} -p ${DEV_CONSTIDS_INC} ${dev} > ${DEV_CC_BBA_DB}.new COMMAND mv ${DEV_CC_BBA_DB}.new ${DEV_CC_BBA_DB} DEPENDS ${DB_PY} ) - add_custom_command(OUTPUT ${DEV_CC_DB} + add_custom_command(OUTPUT ${DEV_CC_DB} COMMAND bbasm --c ${DEV_CC_BBA_DB} ${DEV_CC_DB}.new COMMAND mv ${DEV_CC_DB}.new ${DEV_CC_DB} DEPENDS bbasm ${DEV_CC_BBA_DB} ) - target_sources(ecp5_chipdb PRIVATE ${DEV_CC_DB}) - foreach (target ${family_targets}) - target_sources(${target} PRIVATE $<TARGET_OBJECTS:ecp5_chipdb>) - endforeach (target) - endforeach (dev) + target_sources(ecp5_chipdb PRIVATE ${DEV_CC_DB}) + foreach (target ${family_targets}) + target_sources(${target} PRIVATE $<TARGET_OBJECTS:ecp5_chipdb>) + endforeach (target) + endforeach (dev) + endif() endif() diff --git a/ecp5/globals.cc b/ecp5/globals.cc index ddaae5e5..fae2c683 100644 --- a/ecp5/globals.cc +++ b/ecp5/globals.cc @@ -58,6 +58,8 @@ class Ecp5GlobalRouter if (user.cell->type == id_DCUA && (user.port == id_CH0_FF_RXI_CLK || user.port == id_CH1_FF_RXI_CLK || user.port == id_CH0_FF_TXI_CLK || user.port == id_CH1_FF_TXI_CLK)) return true; + if ((user.cell->type == id_IOLOGIC || user.cell->type == id_SIOLOGIC) && user.port == id_CLK) + return true; return false; } @@ -446,6 +448,8 @@ class Ecp5GlobalRouter if (i < 8) fab_globals.insert(i); } + std::vector<std::pair<PortRef *, int>> toroute; + std::unordered_map<int, NetInfo *> clocks; for (auto cell : sorted(ctx->cells)) { CellInfo *ci = cell.second; if (ci->type == id_DCCA) { @@ -470,15 +474,18 @@ class Ecp5GlobalRouter NPNR_ASSERT(routed); // WCK must have routing priority - auto sorted_users = clock->users; - std::sort(sorted_users.begin(), sorted_users.end(), [this](const PortRef &a, const PortRef &b) { - return global_route_priority(a) < global_route_priority(b); - }); - for (const auto &user : sorted_users) { - route_logic_tile_global(clock, glbid, user); - } + for (auto &user : clock->users) + toroute.emplace_back(&user, glbid); + clocks[glbid] = clock; } } + std::sort(toroute.begin(), toroute.end(), + [this](const std::pair<PortRef *, int> &a, const std::pair<PortRef *, int> &b) { + return global_route_priority(*a.first) < global_route_priority(*b.first); + }); + for (const auto &user : toroute) { + route_logic_tile_global(clocks.at(user.second), user.second, *user.first); + } } }; void promote_ecp5_globals(Context *ctx) { Ecp5GlobalRouter(ctx).promote_globals(); } diff --git a/ecp5/lpf.cc b/ecp5/lpf.cc index 4bde660e..4ac70fc9 100644 --- a/ecp5/lpf.cc +++ b/ecp5/lpf.cc @@ -17,6 +17,7 @@ * */ +#include <boost/algorithm/string.hpp> #include <sstream> #include "log.h" @@ -25,7 +26,7 @@ NEXTPNR_NAMESPACE_BEGIN bool Arch::applyLPF(std::string filename, std::istream &in) { auto isempty = [](const std::string &str) { - return std::all_of(str.begin(), str.end(), [](char c) { return isblank(c); }); + return std::all_of(str.begin(), str.end(), [](char c) { return isblank(c) || c == '\r' || c == '\n'; }); }; auto strip_quotes = [](const std::string &str) { if (str.at(0) == '"') { @@ -41,7 +42,9 @@ bool Arch::applyLPF(std::string filename, std::istream &in) log_error("failed to open LPF file\n"); std::string line; std::string linebuf; + int lineno = 0; while (std::getline(in, line)) { + ++lineno; size_t cstart = line.find('#'); if (cstart != std::string::npos) line = line.substr(0, cstart); @@ -60,29 +63,63 @@ bool Arch::applyLPF(std::string filename, std::istream &in) words.push_back(tmp); if (words.size() >= 0) { std::string verb = words.at(0); - if (verb == "BLOCK" || verb == "SYSCONFIG" || verb == "FREQUENCY") { - log_warning(" ignoring unsupported LPF command '%s'\n", command.c_str()); + if (verb == "BLOCK" || verb == "SYSCONFIG") { + if (words.size() != 2 || (words.at(1) != "ASYNCPATHS" && words.at(1) != "RESETPATHS")) + log_warning(" ignoring unsupported LPF command '%s' (on line %d)\n", command.c_str(), + lineno); + } else if (verb == "FREQUENCY") { + if (words.size() < 2) + log_error("expected object type after FREQUENCY (on line %d)\n", lineno); + std::string etype = words.at(1); + if (etype == "PORT" || etype == "NET") { + if (words.size() < 4) + log_error("expected frequency value and unit after 'FREQUENCY %s' (on line %d)\n", + etype.c_str(), lineno); + std::string target = strip_quotes(words.at(2)); + float freq = std::stof(words.at(3)); + std::string unit = words.at(4); + boost::algorithm::to_upper(unit); + if (unit == "MHZ") + ; + else if (unit == "KHZ") + freq /= 1.0e3; + else if (unit == "HZ") + freq /= 1.0e6; + else + log_error("unsupported frequency unit '%s' (on line %d)\n", unit.c_str(), lineno); + addClock(id(target), freq); + } else { + log_warning(" ignoring unsupported LPF command '%s %s' (on line %d)\n", command.c_str(), + etype.c_str(), lineno); + } } else if (verb == "LOCATE") { - NPNR_ASSERT(words.at(1) == "COMP"); + if (words.size() < 5) + log_error("expected syntax 'LOCATE COMP <port name> SITE <pin>' (on line %d)\n", lineno); + if (words.at(1) != "COMP") + log_error("expected 'COMP' after 'LOCATE' (on line %d)\n", lineno); std::string cell = strip_quotes(words.at(2)); - NPNR_ASSERT(words.at(3) == "SITE"); + if (words.at(3) != "SITE") + log_error("expected 'SITE' after 'LOCATE COMP %s' (on line %d)\n", cell.c_str(), lineno); auto fnd_cell = cells.find(id(cell)); - if (fnd_cell == cells.end()) { - log_warning("unmatched LPF 'LOCATE COMP' '%s'\n", cell.c_str()); - } else { + if (fnd_cell != cells.end()) { fnd_cell->second->attrs[id("LOC")] = strip_quotes(words.at(4)); } } else if (verb == "IOBUF") { - NPNR_ASSERT(words.at(1) == "PORT"); + if (words.size() < 3) + log_error("expected syntax 'IOBUF PORT <port name> <attr>=<value>...' (on line %d)\n", + lineno); + if (words.at(1) != "PORT") + log_error("expected 'PORT' after 'IOBUF' (on line %d)\n", lineno); std::string cell = strip_quotes(words.at(2)); auto fnd_cell = cells.find(id(cell)); - if (fnd_cell == cells.end()) { - log_warning("unmatched LPF 'IOBUF PORT' '%s'\n", cell.c_str()); - } else { + if (fnd_cell != cells.end()) { for (size_t i = 3; i < words.size(); i++) { std::string setting = words.at(i); size_t eqpos = setting.find('='); - NPNR_ASSERT(eqpos != std::string::npos); + if (eqpos == std::string::npos) + log_error( + "expected syntax 'IOBUF PORT <port name> <attr>=<value>...' (on line %d)\n", + lineno); std::string key = setting.substr(0, eqpos), value = setting.substr(eqpos + 1); fnd_cell->second->attrs[id(key)] = value; } diff --git a/ecp5/main.cc b/ecp5/main.cc index 12afb09d..bb18aa58 100644 --- a/ecp5/main.cc +++ b/ecp5/main.cc @@ -25,6 +25,7 @@ #include "design_utils.h" #include "log.h" #include "timing.h" +#include "util.h" USING_NEXTPNR_NAMESPACE @@ -61,10 +62,14 @@ po::options_description ECP5CommandHandler::getArchOptions() specific.add_options()("package", po::value<std::string>(), "select device package (defaults to CABGA381)"); specific.add_options()("speed", po::value<int>(), "select device speedgrade (6, 7 or 8)"); - specific.add_options()("basecfg", po::value<std::string>(), "base chip configuration in Trellis text format"); + specific.add_options()("basecfg", po::value<std::string>(), + "base chip configuration in Trellis text format (deprecated)"); + specific.add_options()("override-basecfg", po::value<std::string>(), + "base chip configuration in Trellis text format"); specific.add_options()("textcfg", po::value<std::string>(), "textual configuration in Trellis format to write"); specific.add_options()("lpf", po::value<std::vector<std::string>>(), "LPF pin constraint file(s)"); + specific.add_options()("lpf-allow-unconstrained", "don't require LPF file(s) to constrain all IO"); return specific; } @@ -77,8 +82,14 @@ void ECP5CommandHandler::validate() void ECP5CommandHandler::customBitstream(Context *ctx) { std::string basecfg; - if (vm.count("basecfg")) + if (vm.count("basecfg")) { + log_warning("--basecfg is deprecated.\nIf you are using a default baseconfig (from prjtrellis/misc/basecfgs), " + "these are now embedded in nextpnr - please remove --basecfg.\nIf you are using a non-standard " + "baseconfig in a special application, switch to using --override-basecfg.\n"); basecfg = vm["basecfg"].as<std::string>(); + } else if (vm.count("override-basecfg")) { + basecfg = vm["basecfg"].as<std::string>(); + } std::string textcfg; if (vm.count("textcfg")) @@ -138,8 +149,8 @@ std::unique_ptr<Context> ECP5CommandHandler::createContext() chipArgs.speed = ArchArgs::SPEED_6; } } - - return std::unique_ptr<Context>(new Context(chipArgs)); + auto ctx = std::unique_ptr<Context>(new Context(chipArgs)); + return ctx; } void ECP5CommandHandler::customAfterLoad(Context *ctx) @@ -148,7 +159,26 @@ void ECP5CommandHandler::customAfterLoad(Context *ctx) std::vector<std::string> files = vm["lpf"].as<std::vector<std::string>>(); for (const auto &filename : files) { std::ifstream in(filename); - ctx->applyLPF(filename, in); + if (!in) + log_error("failed to open LPF file '%s'\n", filename.c_str()); + if (!ctx->applyLPF(filename, in)) + log_error("failed to parse LPF file '%s'\n", filename.c_str()); + } + + for (auto cell : sorted(ctx->cells)) { + CellInfo *ci = cell.second; + if (ci->type == ctx->id("$nextpnr_ibuf") || ci->type == ctx->id("$nextpnr_obuf") || + ci->type == ctx->id("$nextpnr_iobuf")) { + if (!ci->attrs.count(ctx->id("LOC"))) { + if (vm.count("lpf-allow-unconstrained")) + log_warning("IO '%s' is unconstrained in LPF and will be automatically placed\n", + cell.first.c_str(ctx)); + else + log_error("IO '%s' is unconstrained in LPF (override this error with " + "--lpf-allow-unconstrained)\n", + cell.first.c_str(ctx)); + } + } } } } diff --git a/ecp5/pack.cc b/ecp5/pack.cc index ca329530..7f00de1f 100644 --- a/ecp5/pack.cc +++ b/ecp5/pack.cc @@ -20,12 +20,14 @@ #include <algorithm> #include <boost/optional.hpp> #include <iterator> +#include <queue> #include <unordered_set> #include "cells.h" #include "chain_utils.h" #include "design_utils.h" #include "globals.h" #include "log.h" +#include "timing.h" #include "util.h" NEXTPNR_NAMESPACE_BEGIN @@ -163,6 +165,7 @@ class Ecp5Packer CellInfo *ci = cell.second; if (is_lut(ctx, ci) && procdLuts.find(cell.first) == procdLuts.end()) { NetInfo *znet = ci->ports.at(ctx->id("Z")).net; + std::vector<NetInfo *> inpnets; if (znet != nullptr) { for (auto user : znet->users) { if (is_lut(ctx, user.cell) && user.cell != ci && @@ -227,12 +230,67 @@ class Ecp5Packer } } } + + // Pack LUTs feeding the same CCU2, RAM or DFF into a SLICE + if (znet != nullptr && znet->users.size() < 10) { + for (auto user : znet->users) { + if (is_lc(ctx, user.cell) || user.cell->type == ctx->id("DP16KD") || is_ff(ctx, user.cell)) { + for (auto port : user.cell->ports) { + if (port.second.type != PORT_IN || port.second.net == nullptr || + port.second.net == znet) + continue; + if (port.second.net->users.size() > 10) + continue; + CellInfo *drv = port.second.net->driver.cell; + if (drv == nullptr) + continue; + if (is_lut(ctx, drv) && !procdLuts.count(drv->name) && + can_pack_lutff(ci->name, drv->name)) { + procdLuts.insert(ci->name); + procdLuts.insert(drv->name); + lutPairs[ci->name] = drv->name; + goto paired_inlut; + } + } + } + } + } + + // Pack LUTs sharing an input with a simple fanout-based heuristic + for (const char *inp : {"A", "B", "C", "D"}) { + NetInfo *innet = ci->ports.at(ctx->id(inp)).net; + if (innet != nullptr && innet->users.size() < 5 && innet->users.size() > 1) + inpnets.push_back(innet); + } + std::sort(inpnets.begin(), inpnets.end(), + [&](const NetInfo *a, const NetInfo *b) { return a->users.size() < b->users.size(); }); + for (auto inet : inpnets) { + for (auto &user : inet->users) { + if (user.cell == nullptr || user.cell == ci || !is_lut(ctx, user.cell)) + continue; + if (procdLuts.count(user.cell->name)) + continue; + if (can_pack_lutff(ci->name, user.cell->name)) { + procdLuts.insert(ci->name); + procdLuts.insert(user.cell->name); + lutPairs[ci->name] = user.cell->name; + goto paired_inlut; + } + } + } + if (false) { paired_inlut: continue; } } } + if (ctx->debug) { + log_info("Singleton LUTs (packer QoR debug): \n"); + for (auto cell : sorted(ctx->cells)) + if (is_lut(ctx, cell.second) && !procdLuts.count(cell.first)) + log_info(" %s\n", cell.first.c_str(ctx)); + } } // Return true if an port is a top level port that provides its own IOBUF @@ -299,7 +357,16 @@ class Ecp5Packer // iobuf log_info("%s feeds TRELLIS_IO %s, removing %s %s.\n", ci->name.c_str(ctx), trio->name.c_str(ctx), ci->type.c_str(ctx), ci->name.c_str(ctx)); + NetInfo *net = trio->ports.at(ctx->id("B")).net; + if (((ci->type == ctx->id("$nextpnr_ibuf") || ci->type == ctx->id("$nextpnr_iobuf")) && + net->users.size() > 1) || + (ci->type == ctx->id("$nextpnr_obuf") && + (net->users.size() > 2 || net->driver.cell != nullptr)) || + (ci->type == ctx->id("$nextpnr_iobuf") && ci->ports.at(ctx->id("I")).net != nullptr && + ci->ports.at(ctx->id("I")).net->driver.cell != nullptr)) + log_error("Pin B of %s '%s' connected to more than a single top level IO.\n", + trio->type.c_str(ctx), trio->name.c_str(ctx)); if (net != nullptr) { ctx->nets.erase(net->name); trio->ports.at(ctx->id("B")).net = nullptr; @@ -930,11 +997,11 @@ class Ecp5Packer if (is_lut(ctx, ci)) { std::unique_ptr<CellInfo> slice = create_ecp5_cell(ctx, ctx->id("TRELLIS_SLICE"), ci->name.str(ctx) + "_SLICE"); - lut_to_slice(ctx, ci, slice.get(), 0); + lut_to_slice(ctx, ci, slice.get(), 1); auto ff = lutffPairs.find(ci->name); if (ff != lutffPairs.end()) { - ff_to_slice(ctx, ctx->cells.at(ff->second).get(), slice.get(), 0, true); + ff_to_slice(ctx, ctx->cells.at(ff->second).get(), slice.get(), 1, true); packed_cells.insert(ff->second); fflutPairs.erase(ff->second); lutffPairs.erase(ci->name); @@ -1323,6 +1390,19 @@ class Ecp5Packer } } + // Miscellaneous packer tasks + void pack_misc() + { + for (auto cell : sorted(ctx->cells)) { + CellInfo *ci = cell.second; + if (ci->type == id_USRMCLK) { + rename_port(ctx, ci, ctx->id("USRMCLKI"), id_PADDO); + rename_port(ctx, ci, ctx->id("USRMCLKTS"), id_PADDT); + rename_port(ctx, ci, ctx->id("USRMCLKO"), id_PADDI); + } + } + } + // Preplace PLL void preplace_plls() { @@ -1377,13 +1457,934 @@ class Ecp5Packer } } + // Check if two nets have identical constant drivers + bool equal_constant(NetInfo *a, NetInfo *b) + { + if (a->driver.cell == nullptr || b->driver.cell == nullptr) + return (a->driver.cell == nullptr && b->driver.cell == nullptr); + if (a->driver.cell->type != ctx->id("GND") && a->driver.cell->type != ctx->id("VCC")) + return false; + return a->driver.cell->type == b->driver.cell->type; + } + + struct EdgeClockInfo + { + CellInfo *buffer = nullptr; + NetInfo *unbuf = nullptr; + NetInfo *buf = nullptr; + }; + + std::map<std::pair<int, int>, EdgeClockInfo> eclks; + + void make_eclk(PortInfo &usr_port, CellInfo *usr_cell, BelId usr_bel, int bank) + { + NetInfo *ecknet = usr_port.net; + if (ecknet == nullptr) + log_error("Input '%s' of cell '%s' cannot be disconnected\n", usr_port.name.c_str(ctx), + usr_cell->name.c_str(ctx)); + int found_eclk = -1, free_eclk = -1; + for (int i = 0; i < 2; i++) { + if (eclks.count(std::make_pair(bank, i))) { + if (eclks.at(std::make_pair(bank, i)).unbuf == ecknet) { + found_eclk = i; + break; + } + } else if (free_eclk == -1) { + free_eclk = i; + } + } + if (found_eclk == -1) { + if (free_eclk == -1) { + log_error("Unable to promote edge clock '%s' for bank %d. 2/2 edge clocks already used by '%s' and " + "'%s'.\n", + ecknet->name.c_str(ctx), bank, eclks.at(std::make_pair(bank, 0)).unbuf->name.c_str(ctx), + eclks.at(std::make_pair(bank, 1)).unbuf->name.c_str(ctx)); + } else { + log_info("Promoted '%s' to bank %d ECLK%d.\n", ecknet->name.c_str(ctx), bank, free_eclk); + auto &eclk = eclks[std::make_pair(bank, free_eclk)]; + eclk.unbuf = ecknet; + IdString eckname = ctx->id(ecknet->name.str(ctx) + "$eclk" + std::to_string(bank) + "_" + + std::to_string(free_eclk)); + + std::unique_ptr<NetInfo> promoted_ecknet(new NetInfo); + promoted_ecknet->name = eckname; + promoted_ecknet->is_global = true; // Prevents router etc touching this special net + eclk.buf = promoted_ecknet.get(); + NPNR_ASSERT(!ctx->nets.count(eckname)); + ctx->nets[eckname] = std::move(promoted_ecknet); + + // Insert TRELLIS_ECLKBUF to isolate edge clock from general routing + std::unique_ptr<CellInfo> eclkbuf = + create_ecp5_cell(ctx, id_TRELLIS_ECLKBUF, eckname.str(ctx) + "$buffer"); + BelId target_bel; + // Find the correct Bel for the ECLKBUF + IdString eclkname = ctx->id("G_BANK" + std::to_string(bank) + "ECLK" + std::to_string(free_eclk)); + for (auto bel : ctx->getBels()) { + if (ctx->getBelType(bel) != id_TRELLIS_ECLKBUF) + continue; + if (ctx->getWireBasename(ctx->getBelPinWire(bel, id_ECLKO)) != eclkname) + continue; + target_bel = bel; + break; + } + NPNR_ASSERT(target_bel != BelId()); + + eclkbuf->attrs[ctx->id("BEL")] = ctx->getBelName(target_bel).str(ctx); + + connect_port(ctx, ecknet, eclkbuf.get(), id_ECLKI); + connect_port(ctx, eclk.buf, eclkbuf.get(), id_ECLKO); + found_eclk = free_eclk; + eclk.buffer = eclkbuf.get(); + new_cells.push_back(std::move(eclkbuf)); + } + } + + auto &eclk = eclks[std::make_pair(bank, found_eclk)]; + disconnect_port(ctx, usr_cell, usr_port.name); + usr_port.net = nullptr; + connect_port(ctx, eclk.buf, usr_cell, usr_port.name); + + // Simple ECLK router + WireId userWire = ctx->getBelPinWire(usr_bel, usr_port.name); + IdString bnke_name = ctx->id("BNK_ECLK" + std::to_string(found_eclk)); + IdString global_name = ctx->id("G_BANK" + std::to_string(bank) + "ECLK" + std::to_string(found_eclk)); + + std::queue<WireId> upstream; + std::unordered_map<WireId, PipId> backtrace; + upstream.push(userWire); + WireId next; + while (true) { + if (upstream.empty() || upstream.size() > 30000) + log_error("failed to route bank %d ECLK%d to %s.%s\n", bank, found_eclk, + ctx->getBelName(usr_bel).c_str(ctx), usr_port.name.c_str(ctx)); + next = upstream.front(); + upstream.pop(); + if (ctx->debug) + log_info(" visited %s\n", ctx->getWireName(next).c_str(ctx)); + IdString basename = ctx->getWireBasename(next); + if (basename == bnke_name || basename == global_name) { + break; + } + if (ctx->checkWireAvail(next)) { + for (auto pip : ctx->getPipsUphill(next)) { + WireId src = ctx->getPipSrcWire(pip); + backtrace[src] = pip; + upstream.push(src); + } + } + } + // Set all the pips we found along the way + WireId cursor = next; + while (true) { + auto fnd = backtrace.find(cursor); + if (fnd == backtrace.end()) + break; + ctx->bindPip(fnd->second, eclk.buf, STRENGTH_LOCKED); + cursor = ctx->getPipDstWire(fnd->second); + } + } + + void tie_zero(CellInfo *ci, IdString port) + { + + if (!ci->ports.count(port)) { + ci->ports[port].name = port; + ci->ports[port].type = PORT_IN; + } + + std::unique_ptr<CellInfo> zero_cell{new CellInfo}; + std::unique_ptr<NetInfo> zero_net{new NetInfo}; + IdString name = ctx->id(ci->name.str(ctx) + "$zero$" + port.str(ctx)); + zero_cell->type = ctx->id("GND"); + zero_cell->name = name; + zero_net->name = name; + zero_cell->ports[ctx->id("GND")].type = PORT_OUT; + connect_port(ctx, zero_net.get(), zero_cell.get(), ctx->id("GND")); + connect_port(ctx, zero_net.get(), ci, port); + ctx->nets[name] = std::move(zero_net); + new_cells.push_back(std::move(zero_cell)); + } + + std::unordered_map<IdString, std::pair<bool, int>> dqsbuf_dqsg; + // Pack DQSBUFs + void pack_dqsbuf() + { + for (auto cell : sorted(ctx->cells)) { + CellInfo *ci = cell.second; + if (ci->type == id_DQSBUFM) { + CellInfo *pio = net_driven_by(ctx, ci->ports.at(ctx->id("DQSI")).net, is_trellis_io, id_O); + if (pio == nullptr || ci->ports.at(ctx->id("DQSI")).net->users.size() > 1) + log_error("DQSBUFM '%s' DQSI input must be connected only to a top level input\n", + ci->name.c_str(ctx)); + if (!pio->attrs.count(ctx->id("BEL"))) + log_error("DQSBUFM can only be used with a pin-constrained PIO connected to its DQSI input" + "(while processing '%s').\n", + ci->name.c_str(ctx)); + BelId pio_bel = ctx->getBelByName(ctx->id(pio->attrs.at(ctx->id("BEL")))); + NPNR_ASSERT(pio_bel != BelId()); + Loc pio_loc = ctx->getBelLocation(pio_bel); + if (pio_loc.z != 0) + log_error("PIO '%s' does not appear to be a DQS site (expecting an 'A' pin).\n", + ctx->getBelName(pio_bel).c_str(ctx)); + pio_loc.z = 8; + BelId dqsbuf = ctx->getBelByLocation(pio_loc); + if (dqsbuf == BelId() || ctx->getBelType(dqsbuf) != id_DQSBUFM) + log_error("PIO '%s' does not appear to be a DQS site (didn't find a DQSBUFM).\n", + ctx->getBelName(pio_bel).c_str(ctx)); + ci->attrs[ctx->id("BEL")] = ctx->getBelName(dqsbuf).str(ctx); + bool got_dqsg = ctx->getPIODQSGroup(pio_bel, dqsbuf_dqsg[ci->name].first, dqsbuf_dqsg[ci->name].second); + NPNR_ASSERT(got_dqsg); + log_info("Constrained DQSBUFM '%s' to %cDQS%d\n", ci->name.c_str(ctx), + dqsbuf_dqsg[ci->name].first ? 'R' : 'L', dqsbuf_dqsg[ci->name].second); + + // Set all special ports, if used as 'globals' that the router won't touch + for (auto port : {id_DQSR90, id_RDPNTR0, id_RDPNTR1, id_RDPNTR2, id_WRPNTR0, id_WRPNTR1, id_WRPNTR2, + id_DQSW270, id_DQSW}) { + if (!ci->ports.count(port)) + continue; + NetInfo *pn = ci->ports.at(port).net; + if (pn == nullptr) + continue; + for (auto &usr : pn->users) { + if (usr.port != port || + (usr.cell->type != ctx->id("ODDRX2DQA") && usr.cell->type != ctx->id("ODDRX2DQSB") && + usr.cell->type != ctx->id("TSHX2DQSA") && usr.cell->type != ctx->id("IDDRX2DQA") && + usr.cell->type != ctx->id("TSHX2DQA") && usr.cell->type != id_IOLOGIC)) + log_error("Port '%s' of DQSBUFM '%s' cannot drive port '%s' of cell '%s'.\n", + port.c_str(ctx), ci->name.c_str(ctx), usr.port.c_str(ctx), + usr.cell->name.c_str(ctx)); + } + pn->is_global = true; + } + + for (auto zport : + {id_RDMOVE, id_RDDIRECTION, id_WRMOVE, id_WRDIRECTION, id_READ0, id_READ1, id_READCLKSEL0, + id_READCLKSEL1, id_READCLKSEL2, id_DYNDELAY0, id_DYNDELAY1, id_DYNDELAY2, id_DYNDELAY3, + id_DYNDELAY4, id_DYNDELAY5, id_DYNDELAY6, id_DYNDELAY7}) { + if (net_or_nullptr(ci, zport) == nullptr) + tie_zero(ci, zport); + } + } + } + } + + int lookup_delay(const std::string &del_mode) + { + if (del_mode == "USER_DEFINED") + return 0; + else if (del_mode == "DQS_ALIGNED_X2") + return 6; + else if (del_mode == "DQS_CMD_CLK") + return 9; + else if (del_mode == "ECLK_ALIGNED") + return 21; + else if (del_mode == "ECLK_CENTERED") + return 11; + else if (del_mode == "ECLKBRIDGE_ALIGNED") + return 39; + else if (del_mode == "ECLKBRIDGE_CENTERED") + return 29; + else if (del_mode == "SCLK_ALIGNED") + return 50; + else if (del_mode == "SCLK_CENTERED") + return 39; + else if (del_mode == "SCLK_ZEROHOLD") + return 59; + else + log_error("Unsupported DEL_MODE '%s'\n", del_mode.c_str()); + } + + // Pack IOLOGIC + void pack_iologic() + { + std::unordered_map<IdString, CellInfo *> pio_iologic; + + auto set_iologic_sclk = [&](CellInfo *iol, CellInfo *prim, IdString port, bool input) { + NetInfo *sclk = nullptr; + if (prim->ports.count(port)) + sclk = prim->ports[port].net; + if (sclk == nullptr) { + iol->params[input ? ctx->id("CLKIMUX") : ctx->id("CLKOMUX")] = "0"; + } else { + iol->params[input ? ctx->id("CLKIMUX") : ctx->id("CLKOMUX")] = "CLK"; + if (iol->ports[id_CLK].net != nullptr) { + if (iol->ports[id_CLK].net != sclk && !equal_constant(iol->ports[id_CLK].net, sclk)) + log_error("IOLOGIC '%s' has conflicting clocks '%s' and '%s'\n", iol->name.c_str(ctx), + iol->ports[id_CLK].net->name.c_str(ctx), sclk->name.c_str(ctx)); + } else { + connect_port(ctx, sclk, iol, id_CLK); + } + } + if (prim->ports.count(port)) + disconnect_port(ctx, prim, port); + }; + + auto set_iologic_eclk = [&](CellInfo *iol, CellInfo *prim, IdString port) { + NetInfo *eclk = nullptr; + if (prim->ports.count(port)) + eclk = prim->ports[port].net; + if (eclk == nullptr) + log_error("%s '%s' cannot have disconnected ECLK", prim->type.c_str(ctx), prim->name.c_str(ctx)); + + if (iol->ports[id_ECLK].net != nullptr) { + if (iol->ports[id_ECLK].net != eclk) + log_error("IOLOGIC '%s' has conflicting ECLKs '%s' and '%s'\n", iol->name.c_str(ctx), + iol->ports[id_ECLK].net->name.c_str(ctx), eclk->name.c_str(ctx)); + } else { + connect_port(ctx, eclk, iol, id_ECLK); + } + if (prim->ports.count(port)) + disconnect_port(ctx, prim, port); + }; + + auto set_iologic_lsr = [&](CellInfo *iol, CellInfo *prim, IdString port, bool input) { + NetInfo *lsr = nullptr; + if (prim->ports.count(port)) + lsr = prim->ports[port].net; + if (lsr == nullptr) { + iol->params[input ? ctx->id("LSRIMUX") : ctx->id("LSROMUX")] = "0"; + } else { + iol->params[input ? ctx->id("LSRIMUX") : ctx->id("LSROMUX")] = "LSRMUX"; + if (iol->ports[id_LSR].net != nullptr && !equal_constant(iol->ports[id_LSR].net, lsr)) { + if (iol->ports[id_LSR].net != lsr) + log_error("IOLOGIC '%s' has conflicting LSR signals '%s' and '%s'\n", iol->name.c_str(ctx), + iol->ports[id_LSR].net->name.c_str(ctx), lsr->name.c_str(ctx)); + } else if (iol->ports[id_LSR].net == nullptr) { + connect_port(ctx, lsr, iol, id_LSR); + } + } + if (prim->ports.count(port)) + disconnect_port(ctx, prim, port); + }; + + auto set_iologic_mode = [&](CellInfo *iol, std::string mode) { + auto &curr_mode = iol->params[ctx->id("MODE")]; + if (curr_mode != "NONE" && curr_mode != "IREG_OREG" && curr_mode != mode) + log_error("IOLOGIC '%s' has conflicting modes '%s' and '%s'\n", iol->name.c_str(ctx), curr_mode.c_str(), + mode.c_str()); + if (iol->type == id_SIOLOGIC && mode != "IREG_OREG" && mode != "IDDRX1_ODDRX1" && mode != "NONE") + log_error("IOLOGIC '%s' is set to mode '%s', but this is only supported for left and right IO\n", + iol->name.c_str(ctx), mode.c_str()); + curr_mode = mode; + }; + + auto get_pio_bel = [&](CellInfo *pio, CellInfo *curr) { + if (!pio->attrs.count(ctx->id("BEL"))) + log_error("IOLOGIC functionality (DDR, DELAY, DQS, etc) can only be used with pin-constrained PIO " + "(while processing '%s').\n", + curr->name.c_str(ctx)); + BelId bel = ctx->getBelByName(ctx->id(pio->attrs.at(ctx->id("BEL")))); + NPNR_ASSERT(bel != BelId()); + return bel; + }; + + auto create_pio_iologic = [&](CellInfo *pio, CellInfo *curr) { + BelId bel = get_pio_bel(pio, curr); + log_info("IOLOGIC component %s connected to PIO Bel %s\n", curr->name.c_str(ctx), + ctx->getBelName(bel).c_str(ctx)); + Loc loc = ctx->getBelLocation(bel); + bool s = false; + if (loc.y == 0 || loc.y == (ctx->chip_info->height - 1)) + s = true; + std::unique_ptr<CellInfo> iol = + create_ecp5_cell(ctx, s ? id_SIOLOGIC : id_IOLOGIC, pio->name.str(ctx) + "$IOL"); + + loc.z += s ? 2 : 4; + iol->attrs[ctx->id("BEL")] = ctx->getBelName(ctx->getBelByLocation(loc)).str(ctx); + + CellInfo *iol_ptr = iol.get(); + pio_iologic[pio->name] = iol_ptr; + new_cells.push_back(std::move(iol)); + return iol_ptr; + }; + + auto process_dqs_port = [&](CellInfo *prim, CellInfo *pio, CellInfo *iol, IdString port) { + NetInfo *sig = nullptr; + if (prim->ports.count(port)) + sig = prim->ports[port].net; + if (sig == nullptr || sig->driver.cell == nullptr) + log_error("Port %s of cell '%s' cannot be disconnected, it must be driven by a DQSBUFM\n", + port.c_str(ctx), prim->name.c_str(ctx)); + if (iol->ports.at(port).net != nullptr) { + if (iol->ports.at(port).net != sig) { + log_error("IOLOGIC '%s' has conflicting %s signals '%s' and '%s'\n", iol->name.c_str(ctx), + port.c_str(ctx), iol->ports[port].net->name.c_str(ctx), sig->name.c_str(ctx)); + } + disconnect_port(ctx, prim, port); + } else { + bool dqsr; + int dqsgroup; + bool has_dqs = ctx->getPIODQSGroup(get_pio_bel(pio, prim), dqsr, dqsgroup); + if (!has_dqs) + log_error("Primitive '%s' cannot be connected to top level port '%s' as the associated pin is not " + "in any DQS group", + prim->name.c_str(ctx), pio->name.c_str(ctx)); + if (sig->driver.cell->type != id_DQSBUFM || sig->driver.port != port) + log_error("Port %s of cell '%s' must be driven by port %s of a DQSBUFM", port.c_str(ctx), + prim->name.c_str(ctx), port.c_str(ctx)); + auto &driver_group = dqsbuf_dqsg.at(sig->driver.cell->name); + if (driver_group.first != dqsr || driver_group.second != dqsgroup) + log_error("DQS group mismatch, port %s of '%s' in group %cDQ%d is driven by DQSBUFM '%s' in group " + "%cDQ%d\n", + port.c_str(ctx), prim->name.c_str(ctx), dqsr ? 'R' : 'L', dqsgroup, + sig->driver.cell->name.c_str(ctx), driver_group.first ? 'R' : 'L', driver_group.second); + replace_port(prim, port, iol, port); + } + }; + + for (auto cell : sorted(ctx->cells)) { + CellInfo *ci = cell.second; + if (ci->type == ctx->id("DELAYF") || ci->type == ctx->id("DELAYG")) { + CellInfo *i_pio = net_driven_by(ctx, ci->ports.at(ctx->id("A")).net, is_trellis_io, id_O); + CellInfo *o_pio = net_only_drives(ctx, ci->ports.at(ctx->id("Z")).net, is_trellis_io, id_I, true); + CellInfo *iol = nullptr; + if (i_pio != nullptr && ci->ports.at(ctx->id("A")).net->users.size() == 1) { + iol = create_pio_iologic(i_pio, ci); + set_iologic_mode(iol, "IREG_OREG"); + bool drives_iologic = false; + for (auto user : ci->ports.at(ctx->id("Z")).net->users) + if (is_iologic_input_cell(ctx, user.cell) && user.port == ctx->id("D")) + drives_iologic = true; + if (drives_iologic) { + // Reconnect to PIO which the packer expects later on + NetInfo *input_net = ci->ports.at(ctx->id("A")).net, *dly_net = ci->ports.at(ctx->id("Z")).net; + disconnect_port(ctx, i_pio, id_O); + i_pio->ports.at(id_O).net = nullptr; + disconnect_port(ctx, ci, id_A); + ci->ports.at(id_A).net = nullptr; + disconnect_port(ctx, ci, id_Z); + ci->ports.at(id_Z).net = nullptr; + connect_port(ctx, dly_net, i_pio, id_O); + connect_port(ctx, input_net, iol, id_INDD); + connect_port(ctx, input_net, iol, id_DI); + } else { + replace_port(ci, id_A, iol, id_PADDI); + replace_port(ci, id_Z, iol, id_INDD); + } + packed_cells.insert(cell.first); + } else if (o_pio != nullptr) { + iol = create_pio_iologic(o_pio, ci); + iol->params[ctx->id("DELAY.OUTDEL")] = "ENABLED"; + bool driven_by_iol = false; + NetInfo *input_net = ci->ports.at(ctx->id("A")).net, *dly_net = ci->ports.at(ctx->id("Z")).net; + if (input_net->driver.cell != nullptr && is_iologic_output_cell(ctx, input_net->driver.cell) && + input_net->driver.port == ctx->id("Q")) + driven_by_iol = true; + if (driven_by_iol) { + disconnect_port(ctx, o_pio, id_I); + o_pio->ports.at(id_I).net = nullptr; + disconnect_port(ctx, ci, id_A); + ci->ports.at(id_A).net = nullptr; + disconnect_port(ctx, ci, id_Z); + ci->ports.at(id_Z).net = nullptr; + connect_port(ctx, input_net, o_pio, id_I); + ctx->nets.erase(dly_net->name); + } else { + replace_port(ci, ctx->id("A"), iol, id_TXDATA0); + replace_port(ci, ctx->id("Z"), iol, id_IOLDO); + if (!o_pio->ports.count(id_IOLDO)) { + o_pio->ports[id_IOLDO].name = id_IOLDO; + o_pio->ports[id_IOLDO].type = PORT_IN; + } + replace_port(o_pio, id_I, o_pio, id_IOLDO); + } + packed_cells.insert(cell.first); + } else { + log_error("%s '%s' must be connected directly to top level input or output\n", ci->type.c_str(ctx), + ci->name.c_str(ctx)); + } + iol->params[ctx->id("DELAY.DEL_VALUE")] = + std::to_string(lookup_delay(str_or_default(ci->params, ctx->id("DEL_MODE"), "USER_DEFINED"))); + if (ci->params.count(ctx->id("DEL_VALUE")) && + ci->params.at(ctx->id("DEL_VALUE")).substr(0, 5) != "DELAY") + iol->params[ctx->id("DELAY.DEL_VALUE")] = ci->params.at(ctx->id("DEL_VALUE")); + if (ci->ports.count(id_LOADN)) + replace_port(ci, id_LOADN, iol, id_LOADN); + else + tie_zero(ci, id_LOADN); + if (ci->ports.count(id_MOVE)) + replace_port(ci, id_MOVE, iol, id_MOVE); + else + tie_zero(ci, id_MOVE); + if (ci->ports.count(id_DIRECTION)) + replace_port(ci, id_DIRECTION, iol, id_DIRECTION); + else + tie_zero(ci, id_DIRECTION); + if (ci->ports.count(id_CFLAG)) + replace_port(ci, id_CFLAG, iol, id_CFLAG); + } + } + + for (auto cell : sorted(ctx->cells)) { + CellInfo *ci = cell.second; + if (ci->type == ctx->id("IDDRX1F")) { + CellInfo *pio = net_driven_by(ctx, ci->ports.at(ctx->id("D")).net, is_trellis_io, id_O); + if (pio == nullptr || ci->ports.at(ctx->id("D")).net->users.size() > 1) + log_error("IDDRX1F '%s' D input must be connected only to a top level input\n", + ci->name.c_str(ctx)); + CellInfo *iol; + if (pio_iologic.count(pio->name)) + iol = pio_iologic.at(pio->name); + else + iol = create_pio_iologic(pio, ci); + set_iologic_mode(iol, "IDDRX1_ODDRX1"); + replace_port(ci, ctx->id("D"), iol, id_PADDI); + set_iologic_sclk(iol, ci, ctx->id("SCLK"), true); + set_iologic_lsr(iol, ci, ctx->id("RST"), true); + replace_port(ci, ctx->id("Q0"), iol, id_RXDATA0); + replace_port(ci, ctx->id("Q1"), iol, id_RXDATA1); + iol->params[ctx->id("GSR")] = str_or_default(ci->params, ctx->id("GSR"), "DISABLED"); + packed_cells.insert(cell.first); + } else if (ci->type == ctx->id("ODDRX1F")) { + CellInfo *pio = net_only_drives(ctx, ci->ports.at(ctx->id("Q")).net, is_trellis_io, id_I, true); + if (pio == nullptr) + log_error("ODDRX1F '%s' Q output must be connected only to a top level output\n", + ci->name.c_str(ctx)); + CellInfo *iol; + if (pio_iologic.count(pio->name)) + iol = pio_iologic.at(pio->name); + else + iol = create_pio_iologic(pio, ci); + set_iologic_mode(iol, "IDDRX1_ODDRX1"); + replace_port(ci, ctx->id("Q"), iol, id_IOLDO); + if (!pio->ports.count(id_IOLDO)) { + pio->ports[id_IOLDO].name = id_IOLDO; + pio->ports[id_IOLDO].type = PORT_IN; + } + replace_port(pio, id_I, pio, id_IOLDO); + pio->params[ctx->id("DATAMUX_ODDR")] = "IOLDO"; + set_iologic_sclk(iol, ci, ctx->id("SCLK"), false); + set_iologic_lsr(iol, ci, ctx->id("RST"), false); + replace_port(ci, ctx->id("D0"), iol, id_TXDATA0); + replace_port(ci, ctx->id("D1"), iol, id_TXDATA1); + iol->params[ctx->id("GSR")] = str_or_default(ci->params, ctx->id("GSR"), "DISABLED"); + packed_cells.insert(cell.first); + } else if (ci->type == ctx->id("ODDRX2F")) { + CellInfo *pio = net_only_drives(ctx, ci->ports.at(ctx->id("Q")).net, is_trellis_io, id_I, true); + if (pio == nullptr) + log_error("ODDRX2F '%s' Q output must be connected only to a top level output\n", + ci->name.c_str(ctx)); + CellInfo *iol; + if (pio_iologic.count(pio->name)) + iol = pio_iologic.at(pio->name); + else + iol = create_pio_iologic(pio, ci); + set_iologic_mode(iol, "ODDRXN"); + replace_port(ci, ctx->id("Q"), iol, id_IOLDO); + if (!pio->ports.count(id_IOLDO)) { + pio->ports[id_IOLDO].name = id_IOLDO; + pio->ports[id_IOLDO].type = PORT_IN; + } + replace_port(pio, id_I, pio, id_IOLDO); + set_iologic_sclk(iol, ci, ctx->id("SCLK"), false); + set_iologic_sclk(iol, ci, ctx->id("SCLK"), true); + set_iologic_eclk(iol, ci, id_ECLK); + set_iologic_lsr(iol, ci, ctx->id("RST"), false); + set_iologic_lsr(iol, ci, ctx->id("RST"), true); + replace_port(ci, ctx->id("D0"), iol, id_TXDATA0); + replace_port(ci, ctx->id("D1"), iol, id_TXDATA1); + replace_port(ci, ctx->id("D2"), iol, id_TXDATA2); + replace_port(ci, ctx->id("D3"), iol, id_TXDATA3); + iol->params[ctx->id("GSR")] = str_or_default(ci->params, ctx->id("GSR"), "DISABLED"); + iol->params[ctx->id("ODDRXN.MODE")] = "ODDRX2"; + pio->params[ctx->id("DATAMUX_ODDR")] = "IOLDO"; + packed_cells.insert(cell.first); + } else if (ci->type == ctx->id("IDDRX2F")) { + CellInfo *pio = net_driven_by(ctx, ci->ports.at(ctx->id("D")).net, is_trellis_io, id_O); + if (pio == nullptr || ci->ports.at(ctx->id("D")).net->users.size() > 1) + log_error("IDDRX2F '%s' D input must be connected only to a top level input\n", + ci->name.c_str(ctx)); + CellInfo *iol; + if (pio_iologic.count(pio->name)) + iol = pio_iologic.at(pio->name); + else + iol = create_pio_iologic(pio, ci); + set_iologic_mode(iol, "IDDRXN"); + replace_port(ci, ctx->id("D"), iol, id_PADDI); + set_iologic_sclk(iol, ci, ctx->id("SCLK"), true); + set_iologic_eclk(iol, ci, id_ECLK); + set_iologic_lsr(iol, ci, ctx->id("RST"), true); + replace_port(ci, ctx->id("Q0"), iol, id_RXDATA0); + replace_port(ci, ctx->id("Q1"), iol, id_RXDATA1); + replace_port(ci, ctx->id("Q2"), iol, id_RXDATA2); + replace_port(ci, ctx->id("Q3"), iol, id_RXDATA3); + iol->params[ctx->id("GSR")] = str_or_default(ci->params, ctx->id("GSR"), "DISABLED"); + iol->params[ctx->id("IDDRXN.MODE")] = "IDDRX2"; + packed_cells.insert(cell.first); + } else if (ci->type == ctx->id("OSHX2A")) { + CellInfo *pio = net_only_drives(ctx, ci->ports.at(ctx->id("Q")).net, is_trellis_io, id_I, true); + if (pio == nullptr) + log_error("OSHX2A '%s' Q output must be connected only to a top level output\n", + ci->name.c_str(ctx)); + CellInfo *iol; + if (pio_iologic.count(pio->name)) + iol = pio_iologic.at(pio->name); + else + iol = create_pio_iologic(pio, ci); + set_iologic_mode(iol, "MIDDRX_MODDRX"); + replace_port(ci, ctx->id("Q"), iol, id_IOLDO); + if (!pio->ports.count(id_IOLDO)) { + pio->ports[id_IOLDO].name = id_IOLDO; + pio->ports[id_IOLDO].type = PORT_IN; + } + replace_port(pio, id_I, pio, id_IOLDO); + set_iologic_sclk(iol, ci, ctx->id("SCLK"), false); + set_iologic_eclk(iol, ci, id_ECLK); + set_iologic_lsr(iol, ci, ctx->id("RST"), false); + set_iologic_lsr(iol, ci, ctx->id("RST"), true); + replace_port(ci, ctx->id("D0"), iol, id_TXDATA0); + replace_port(ci, ctx->id("D1"), iol, id_TXDATA2); + iol->params[ctx->id("GSR")] = str_or_default(ci->params, ctx->id("GSR"), "DISABLED"); + iol->params[ctx->id("MODDRX.MODE")] = "MOSHX2"; + pio->params[ctx->id("DATAMUX_MDDR")] = "IOLDO"; + packed_cells.insert(cell.first); + } else if (ci->type == ctx->id("ODDRX2DQA") || ci->type == ctx->id("ODDRX2DQSB")) { + CellInfo *pio = net_only_drives(ctx, ci->ports.at(ctx->id("Q")).net, is_trellis_io, id_I, true); + if (pio == nullptr) + log_error("%s '%s' Q output must be connected only to a top level output\n", ci->type.c_str(ctx), + ci->name.c_str(ctx)); + CellInfo *iol; + if (pio_iologic.count(pio->name)) + iol = pio_iologic.at(pio->name); + else + iol = create_pio_iologic(pio, ci); + set_iologic_mode(iol, "MIDDRX_MODDRX"); + replace_port(ci, ctx->id("Q"), iol, id_IOLDO); + if (!pio->ports.count(id_IOLDO)) { + pio->ports[id_IOLDO].name = id_IOLDO; + pio->ports[id_IOLDO].type = PORT_IN; + } + replace_port(pio, id_I, pio, id_IOLDO); + set_iologic_sclk(iol, ci, ctx->id("SCLK"), false); + set_iologic_eclk(iol, ci, id_ECLK); + set_iologic_lsr(iol, ci, ctx->id("RST"), false); + set_iologic_lsr(iol, ci, ctx->id("RST"), true); + replace_port(ci, ctx->id("D0"), iol, id_TXDATA0); + replace_port(ci, ctx->id("D1"), iol, id_TXDATA1); + replace_port(ci, ctx->id("D2"), iol, id_TXDATA2); + replace_port(ci, ctx->id("D3"), iol, id_TXDATA3); + iol->params[ctx->id("GSR")] = str_or_default(ci->params, ctx->id("GSR"), "DISABLED"); + iol->params[ctx->id("MODDRX.MODE")] = "MODDRX2"; + iol->params[ctx->id("MIDDRX_MODDRX.WRCLKMUX")] = ci->type == ctx->id("ODDRX2DQSB") ? "DQSW" : "DQSW270"; + process_dqs_port(ci, pio, iol, ci->type == ctx->id("ODDRX2DQSB") ? id_DQSW : id_DQSW270); + pio->params[ctx->id("DATAMUX_MDDR")] = "IOLDO"; + packed_cells.insert(cell.first); + } else if (ci->type == ctx->id("IDDRX2DQA")) { + CellInfo *pio = net_driven_by(ctx, ci->ports.at(ctx->id("D")).net, is_trellis_io, id_O); + if (pio == nullptr || ci->ports.at(ctx->id("D")).net->users.size() > 1) + log_error("IDDRX2DQA '%s' D input must be connected only to a top level input\n", + ci->name.c_str(ctx)); + CellInfo *iol; + if (pio_iologic.count(pio->name)) + iol = pio_iologic.at(pio->name); + else + iol = create_pio_iologic(pio, ci); + set_iologic_mode(iol, "MIDDRX_MODDRX"); + replace_port(ci, ctx->id("D"), iol, id_PADDI); + set_iologic_sclk(iol, ci, ctx->id("SCLK"), true); + set_iologic_eclk(iol, ci, id_ECLK); + set_iologic_lsr(iol, ci, ctx->id("RST"), true); + replace_port(ci, ctx->id("Q0"), iol, id_RXDATA0); + replace_port(ci, ctx->id("Q1"), iol, id_RXDATA1); + replace_port(ci, ctx->id("Q2"), iol, id_RXDATA2); + replace_port(ci, ctx->id("Q3"), iol, id_RXDATA3); + replace_port(ci, ctx->id("QWL"), iol, id_INFF); + iol->params[ctx->id("GSR")] = str_or_default(ci->params, ctx->id("GSR"), "DISABLED"); + iol->params[ctx->id("MIDDRX.MODE")] = "MIDDRX2"; + process_dqs_port(ci, pio, iol, id_DQSR90); + process_dqs_port(ci, pio, iol, id_RDPNTR2); + process_dqs_port(ci, pio, iol, id_RDPNTR1); + process_dqs_port(ci, pio, iol, id_RDPNTR0); + process_dqs_port(ci, pio, iol, id_WRPNTR2); + process_dqs_port(ci, pio, iol, id_WRPNTR1); + process_dqs_port(ci, pio, iol, id_WRPNTR0); + packed_cells.insert(cell.first); + } else if (ci->type == ctx->id("TSHX2DQA") || ci->type == ctx->id("TSHX2DQSA")) { + CellInfo *pio = net_only_drives(ctx, ci->ports.at(ctx->id("Q")).net, is_trellis_io, id_T, true); + if (pio == nullptr) + log_error("%s '%s' Q output must be connected only to a top level tristate\n", ci->type.c_str(ctx), + ci->name.c_str(ctx)); + CellInfo *iol; + if (pio_iologic.count(pio->name)) + iol = pio_iologic.at(pio->name); + else + iol = create_pio_iologic(pio, ci); + set_iologic_mode(iol, "MIDDRX_MODDRX"); + replace_port(ci, ctx->id("Q"), iol, id_IOLTO); + if (!pio->ports.count(id_IOLTO)) { + pio->ports[id_IOLTO].name = id_IOLTO; + pio->ports[id_IOLTO].type = PORT_IN; + } + replace_port(pio, id_T, pio, id_IOLTO); + set_iologic_sclk(iol, ci, ctx->id("SCLK"), false); + set_iologic_eclk(iol, ci, id_ECLK); + set_iologic_lsr(iol, ci, ctx->id("RST"), false); + replace_port(ci, ctx->id("T0"), iol, id_TSDATA0); + replace_port(ci, ctx->id("T1"), iol, id_TSDATA1); + process_dqs_port(ci, pio, iol, ci->type == ctx->id("TSHX2DQSA") ? id_DQSW : id_DQSW270); + iol->params[ctx->id("GSR")] = str_or_default(ci->params, ctx->id("GSR"), "DISABLED"); + iol->params[ctx->id("MTDDRX.MODE")] = "MTSHX2"; + iol->params[ctx->id("MTDDRX.REGSET")] = "SET"; + iol->params[ctx->id("MTDDRX.DQSW_INVERT")] = ci->type == ctx->id("TSHX2DQSA") ? "ENABLED" : "DISABLED"; + iol->params[ctx->id("MIDDRX_MODDRX.WRCLKMUX")] = ci->type == ctx->id("TSHX2DQSA") ? "DQSW" : "DQSW270"; + iol->params[ctx->id("IOLTOMUX")] = "TDDR"; + packed_cells.insert(cell.first); + } + } + flush_cells(); + // Promote/route edge clocks + for (auto cell : sorted(ctx->cells)) { + CellInfo *ci = cell.second; + if (ci->type == id_IOLOGIC || ci->type == id_DQSBUFM) { + if (!ci->ports.count(id_ECLK) || ci->ports.at(id_ECLK).net == nullptr) + continue; + BelId bel = ctx->getBelByName(ctx->id(str_or_default(ci->attrs, ctx->id("BEL")))); + NPNR_ASSERT(bel != BelId()); + Loc pioLoc = ctx->getBelLocation(bel); + if (ci->type == id_DQSBUFM) + pioLoc.z -= 8; + else + pioLoc.z -= 4; + BelId pioBel = ctx->getBelByLocation(pioLoc); + NPNR_ASSERT(pioBel != BelId()); + int bank = ctx->getPioBelBank(pioBel); + make_eclk(ci->ports.at(id_ECLK), ci, bel, bank); + } + } + flush_cells(); + // Constrain ECLK-related cells + for (auto cell : sorted(ctx->cells)) { + CellInfo *ci = cell.second; + if (ci->type == id_CLKDIVF) { + const NetInfo *clki = net_or_nullptr(ci, id_CLKI); + for (auto &eclk : eclks) { + if (eclk.second.unbuf == clki) { + for (auto bel : ctx->getBels()) { + if (ctx->getBelType(bel) != id_CLKDIVF) + continue; + Loc loc = ctx->getBelLocation(bel); + // CLKDIVF for bank 6/7 on the left; for bank 2/3 on the right + if (loc.x < 10 && eclk.first.first != 6 && eclk.first.first != 7) + continue; + // z-index of CLKDIVF must match index of ECLK + if (loc.z != eclk.first.second) + continue; + ci->attrs[ctx->id("BEL")] = ctx->getBelName(bel).str(ctx); + make_eclk(ci->ports.at(id_CLKI), ci, bel, eclk.first.first); + goto clkdiv_done; + } + } + } + clkdiv_done: + continue; + } else if (ci->type == id_ECLKSYNCB) { + const NetInfo *eclko = net_or_nullptr(ci, id_ECLKO); + if (eclko == nullptr) + log_error("ECLKSYNCB '%s' has disconnected port ECLKO\n", ci->name.c_str(ctx)); + for (auto user : eclko->users) { + if (user.cell->type == id_TRELLIS_ECLKBUF) { + Loc eckbuf_loc = + ctx->getBelLocation(ctx->getBelByName(ctx->id(user.cell->attrs.at(ctx->id("BEL"))))); + for (auto bel : ctx->getBels()) { + if (ctx->getBelType(bel) != id_ECLKSYNCB) + continue; + Loc loc = ctx->getBelLocation(bel); + if (loc.x == eckbuf_loc.x && loc.y == eckbuf_loc.y && loc.z == eckbuf_loc.z - 2) { + ci->attrs[ctx->id("BEL")] = ctx->getBelName(bel).str(ctx); + goto eclksync_done; + } + } + } + } + eclksync_done: + continue; + } else if (ci->type == ctx->id("DDRDLLA")) { + ci->type = id_DDRDLL; // transform from Verilog to Bel name + const NetInfo *clk = net_or_nullptr(ci, id_CLK); + if (clk == nullptr) + log_error("DDRDLLA '%s' has disconnected port CLK\n", ci->name.c_str(ctx)); + for (auto &eclk : eclks) { + if (eclk.second.unbuf == clk) { + for (auto bel : ctx->getBels()) { + if (ctx->getBelType(bel) != id_DDRDLL) + continue; + Loc loc = ctx->getBelLocation(bel); + int ddrdll_bank = -1; + if (loc.x < 15 && loc.y < 15) + ddrdll_bank = 7; + else if (loc.x < 15 && loc.y > 15) + ddrdll_bank = 6; + else if (loc.x > 15 && loc.y < 15) + ddrdll_bank = 2; + else if (loc.x > 15 && loc.y > 15) + ddrdll_bank = 3; + if (eclk.first.first != ddrdll_bank) + continue; + ci->attrs[ctx->id("BEL")] = ctx->getBelName(bel).str(ctx); + make_eclk(ci->ports.at(id_CLK), ci, bel, eclk.first.first); + goto ddrdll_done; + } + } + } + ddrdll_done: + continue; + } + } + + flush_cells(); + }; + + void generate_constraints() + { + log_info("Generating derived timing constraints...\n"); + auto MHz = [&](delay_t a) { return 1000.0 / ctx->getDelayNS(a); }; + + auto equals_epsilon = [](delay_t a, delay_t b) { return (std::abs(a - b) / std::max(double(b), 1.0)) < 1e-3; }; + + std::unordered_set<IdString> user_constrained, changed_nets; + for (auto &net : ctx->nets) { + if (net.second->clkconstr != nullptr) + user_constrained.insert(net.first); + changed_nets.insert(net.first); + } + auto get_period = [&](CellInfo *ci, IdString port, delay_t &period) { + if (!ci->ports.count(port)) + return false; + NetInfo *from = ci->ports.at(port).net; + if (from == nullptr || from->clkconstr == nullptr) + return false; + period = from->clkconstr->period.min_delay; + return true; + }; + + auto set_period = [&](CellInfo *ci, IdString port, delay_t period) { + if (!ci->ports.count(port)) + return; + NetInfo *to = ci->ports.at(port).net; + if (to == nullptr) + return; + if (to->clkconstr != nullptr) { + if (!equals_epsilon(to->clkconstr->period.min_delay, period) && user_constrained.count(to->name)) + log_warning( + " Overriding derived constraint of %.1f MHz on net %s with user-specified constraint of " + "%.1f MHz.\n", + MHz(to->clkconstr->period.min_delay), to->name.c_str(ctx), MHz(period)); + return; + } + to->clkconstr = std::unique_ptr<ClockConstraint>(new ClockConstraint()); + to->clkconstr->low.min_delay = period / 2; + to->clkconstr->low.max_delay = period / 2; + to->clkconstr->high.min_delay = period / 2; + to->clkconstr->high.max_delay = period / 2; + to->clkconstr->period.min_delay = period; + to->clkconstr->period.max_delay = period; + log_info(" Derived frequency constraint of %.1f MHz for net %s\n", MHz(to->clkconstr->period.min_delay), + to->name.c_str(ctx)); + changed_nets.insert(to->name); + }; + + auto copy_constraint = [&](CellInfo *ci, IdString fromPort, IdString toPort, double ratio = 1.0) { + if (!ci->ports.count(fromPort) || !ci->ports.count(toPort)) + return; + NetInfo *from = ci->ports.at(fromPort).net, *to = ci->ports.at(toPort).net; + if (from == nullptr || from->clkconstr == nullptr || to == nullptr) + return; + if (to->clkconstr != nullptr) { + if (!equals_epsilon(to->clkconstr->period.min_delay, + delay_t(from->clkconstr->period.min_delay / ratio)) && + user_constrained.count(to->name)) + log_warning( + " Overriding derived constraint of %.1f MHz on net %s with user-specified constraint of " + "%.1f MHz.\n", + MHz(to->clkconstr->period.min_delay), to->name.c_str(ctx), + MHz(delay_t(from->clkconstr->period.min_delay / ratio))); + return; + } + to->clkconstr = std::unique_ptr<ClockConstraint>(new ClockConstraint()); + to->clkconstr->low = ctx->getDelayFromNS(ctx->getDelayNS(from->clkconstr->low.min_delay) / ratio); + to->clkconstr->high = ctx->getDelayFromNS(ctx->getDelayNS(from->clkconstr->high.min_delay) / ratio); + to->clkconstr->period = ctx->getDelayFromNS(ctx->getDelayNS(from->clkconstr->period.min_delay) / ratio); + log_info(" Derived frequency constraint of %.1f MHz for net %s\n", MHz(to->clkconstr->period.min_delay), + to->name.c_str(ctx)); + changed_nets.insert(to->name); + }; + + // Run in a loop while constraints are changing to deal with dependencies + // Iteration limit avoids hanging in crazy loopback situation (self-fed PLLs or dividers, etc) + int iter = 0; + const int itermax = 5000; + while (!changed_nets.empty() && iter < itermax) { + ++iter; + std::unordered_set<IdString> changed_cells; + for (auto net : changed_nets) + for (auto &user : ctx->nets.at(net)->users) + if (user.port == id_CLKI || user.port == id_ECLKI) + changed_cells.insert(user.cell->name); + changed_nets.clear(); + for (auto cell : sorted(changed_cells)) { + CellInfo *ci = ctx->cells.at(cell).get(); + if (ci->type == id_CLKDIVF) { + std::string div = str_or_default(ci->params, ctx->id("DIV"), "2.0"); + double ratio; + if (div == "2.0") + ratio = 1 / 2.0; + else if (div == "3.5") + ratio = 1 / 3.5; + else + log_error("Unsupported divider ratio '%s' on CLKDIVF '%s'\n", div.c_str(), ci->name.c_str(ctx)); + copy_constraint(ci, id_CLKI, id_CDIVX, ratio); + } else if (ci->type == id_ECLKSYNCB || ci->type == id_TRELLIS_ECLKBUF) { + copy_constraint(ci, id_ECLKI, id_ECLKO, 1); + } else if (ci->type == id_EHXPLLL) { + delay_t period_in; + if (!get_period(ci, id_CLKI, period_in)) + continue; + log_info(" Input frequency of PLL '%s' is constrained to %.1f MHz\n", ci->name.c_str(ctx), + MHz(period_in)); + double period_in_div = period_in * int_or_default(ci->params, ctx->id("CLKI_DIV"), 1); + std::string path = str_or_default(ci->params, ctx->id("FEEDBK_PATH"), "CLKOP"); + int feedback_div = int_or_default(ci->params, ctx->id("CLKFB_DIV"), 1); + if (path == "CLKOP" || path == "INT_OP") + feedback_div *= int_or_default(ci->params, ctx->id("CLKOP_DIV"), 1); + else if (path == "CLKOS" || path == "INT_OS") + feedback_div *= int_or_default(ci->params, ctx->id("CLKOS_DIV"), 1); + else if (path == "CLKOS2" || path == "INT_OS2") + feedback_div *= int_or_default(ci->params, ctx->id("CLKOS2_DIV"), 1); + else if (path == "CLKOS3" || path == "INT_OS3") + feedback_div *= int_or_default(ci->params, ctx->id("CLKOS3_DIV"), 1); + else { + log_info(" Unable to determine output frequencies for PLL '%s' with FEEDBK_PATH=%s\n", + ci->name.c_str(ctx), path.c_str()); + continue; + } + double vco_period = period_in_div / feedback_div; + double vco_freq = MHz(vco_period); + if (vco_freq < 400 || vco_freq > 800) + log_info(" Derived VCO frequency %.1f MHz of PLL '%s' is out of legal range [400MHz, " + "800MHz]\n", + vco_freq, ci->name.c_str(ctx)); + set_period(ci, id_CLKOP, vco_period * int_or_default(ci->params, ctx->id("CLKOP_DIV"), 1)); + set_period(ci, id_CLKOS, vco_period * int_or_default(ci->params, ctx->id("CLKOS_DIV"), 1)); + set_period(ci, id_CLKOS2, vco_period * int_or_default(ci->params, ctx->id("CLKOS2_DIV"), 1)); + set_period(ci, id_CLKOS3, vco_period * int_or_default(ci->params, ctx->id("CLKOS3_DIV"), 1)); + } else if (ci->type == id_OSCG) { + int div = int_or_default(ci->params, ctx->id("DIV"), 128); + set_period(ci, id_OSC, delay_t((1.0e6 / (2.0 * 155)) * div)); + } + } + } + } + public: void pack() { pack_io(); + pack_dqsbuf(); + pack_iologic(); pack_ebr(); pack_dsps(); pack_dcus(); + pack_misc(); preplace_plls(); pack_constants(); pack_dram(); @@ -1394,6 +2395,7 @@ class Ecp5Packer pack_lut_pairs(); pack_remaining_luts(); pack_remaining_ffs(); + generate_constraints(); promote_ecp5_globals(ctx); ctx->check(); } @@ -1458,6 +2460,9 @@ void Arch::assignArchInfo() ci->sliceInfo.clkmux = id(str_or_default(ci->params, id_CLKMUX, "CLK")); ci->sliceInfo.lsrmux = id(str_or_default(ci->params, id_LSRMUX, "LSR")); ci->sliceInfo.srmode = id(str_or_default(ci->params, id_SRMODE, "LSR_OVER_CE")); + ci->sliceInfo.is_carry = str_or_default(ci->params, id("MODE"), "LOGIC") == "CCU2"; + ci->sliceInfo.sd0 = int_or_default(ci->params, id("REG0_SD"), 0); + ci->sliceInfo.sd1 = int_or_default(ci->params, id("REG1_SD"), 0); ci->sliceInfo.has_l6mux = false; if (ci->ports.count(id_FXA) && ci->ports[id_FXA].net != nullptr && ci->ports[id_FXA].net->driver.port == id_OFX0) diff --git a/ecp5/trellis_import.py b/ecp5/trellis_import.py index cdd3bd06..610bd331 100755 --- a/ecp5/trellis_import.py +++ b/ecp5/trellis_import.py @@ -119,9 +119,20 @@ def process_pio_db(ddrg, device): pinfunc = metaitem["function"] else: pinfunc = None + dqs = -1 + if "dqs" in metaitem: + tdqs = metaitem["dqs"] + if tdqs[0] == "L": + dqs = 0 + elif tdqs[0] == "R": + dqs = 2048 + suffix_size = 0 + while tdqs[-(suffix_size+1)].isdigit(): + suffix_size += 1 + dqs |= int(tdqs[-suffix_size:]) bel_idx = get_bel_index(ddrg, loc, pio) if bel_idx is not None: - pindata.append((loc, bel_idx, bank, pinfunc)) + pindata.append((loc, bel_idx, bank, pinfunc, dqs)) global_data = {} quadrants = ["UL", "UR", "LL", "LR"] @@ -142,7 +153,7 @@ speed_grade_names = ["6", "7", "8", "8_5G"] speed_grade_cells = {} speed_grade_pips = {} -pip_class_to_idx = {"default": 0} +pip_class_to_idx = {"default": 0, "zero": 1} timing_port_xform = { "RAD0": "D0", @@ -188,7 +199,7 @@ def process_timing_data(): pip_class_delays = [] for i in range(len(pip_class_to_idx)): pip_class_delays.append((50, 50, 0, 0)) - + pip_class_delays[pip_class_to_idx["zero"]] = (0, 0, 0, 0) with open(timing_dbs.interconnect_db_path("ECP5", grade)) as f: interconn_data = json.load(f) for pipclass, pipdata in sorted(interconn_data.items()): @@ -208,6 +219,12 @@ def process_timing_data(): def get_pip_class(wire_from, wire_to): + + if "FCO" in wire_from or "FCI" in wire_to: + return pip_class_to_idx["zero"] + if "F5" in wire_from or "FX" in wire_from or "FXA" in wire_to or "FXB" in wire_to: + return pip_class_to_idx["zero"] + class_name = pip_classes.get_pip_class(wire_from, wire_to) if class_name is None or class_name not in pip_class_to_idx: class_name = "default" @@ -360,7 +377,7 @@ def write_database(dev_name, chip, ddrg, endianness): bba.l("pio_info", "PIOInfoPOD") for pin in pindata: - loc, bel_idx, bank, func = pin + loc, bel_idx, bank, func, dqs = pin write_loc(loc, "abs_loc") bba.u32(bel_idx, "bel_index") if func is not None: @@ -368,7 +385,7 @@ def write_database(dev_name, chip, ddrg, endianness): else: bba.r(None, "function_name") bba.u16(bank, "bank") - bba.u16(0, "padding") + bba.u16(dqs, "dqsgroup") bba.l("tiletype_names", "RelPtr<char>") for tt, idx in sorted(tiletype_names.items(), key=lambda x: x[1]): |