diff options
Diffstat (limited to 'ecp5')
| -rw-r--r-- | ecp5/bitstream.cc | 3 | ||||
| -rw-r--r-- | ecp5/synth/blinky.v | 22 | ||||
| -rw-r--r-- | ecp5/synth/ulx3s.v | 11 |
3 files changed, 30 insertions, 6 deletions
diff --git a/ecp5/bitstream.cc b/ecp5/bitstream.cc index f4f175bb..0e8d4aa4 100644 --- a/ecp5/bitstream.cc +++ b/ecp5/bitstream.cc @@ -234,6 +234,9 @@ void write_bitstream(Context *ctx, std::string base_config_file, std::string tex std::string cib_wirename = ctx->locInfo(cib_wire)->wire_data[cib_wire.index].name.get(); cc.tiles[cib_tile].add_enum("CIB." + cib_wirename + "MUX", "0"); } + if (dir == "INPUT") { + cc.tiles[pio_tile].add_enum(pio + ".HYSTERESIS", "ON"); + } } else { NPNR_ASSERT_FALSE("unsupported cell type"); } diff --git a/ecp5/synth/blinky.v b/ecp5/synth/blinky.v index aba58801..bda627cc 100644 --- a/ecp5/synth/blinky.v +++ b/ecp5/synth/blinky.v @@ -1,10 +1,25 @@ -module top(input clk_pin, output [3:0] led_pin); +module top(input clk_pin, output [3:0] led_pin, output gpio0_pin); wire clk; wire [3:0] led; + wire gpio0; + + (* BEL="X0/Y35/PIOA" *) (* IO_TYPE="LVCMOS33" *) TRELLIS_IO #(.DIR("INPUT")) clk_buf (.B(clk_pin), .O(clk)); - TRELLIS_IO #(.DIR("OUTPUT")) led_buf [3:0] (.B(led_pin), .I(led)); + + (* BEL="X0/Y23/PIOC" *) (* IO_TYPE="LVCMOS33" *) + TRELLIS_IO #(.DIR("OUTPUT")) led_buf_0 (.B(led_pin[0]), .I(led[0])); + (* BEL="X0/Y23/PIOD" *) (* IO_TYPE="LVCMOS33" *) + TRELLIS_IO #(.DIR("OUTPUT")) led_buf_1 (.B(led_pin[1]), .I(led[1])); + (* BEL="X0/Y26/PIOA" *) (* IO_TYPE="LVCMOS33" *) + TRELLIS_IO #(.DIR("OUTPUT")) led_buf_2 (.B(led_pin[2]), .I(led[2])); + (* BEL="X0/Y26/PIOC" *) (* IO_TYPE="LVCMOS33" *) + TRELLIS_IO #(.DIR("OUTPUT")) led_buf_3 (.B(led_pin[3]), .I(led[3])); + + + (* BEL="X0/Y62/PIOD" *) (* IO_TYPE="LVCMOS33" *) + TRELLIS_IO #(.DIR("OUTPUT")) gpio0_buf (.B(gpio0_pin), .I(gpio0)); reg [25:0] ctr = 0; @@ -13,4 +28,7 @@ module top(input clk_pin, output [3:0] led_pin); assign led = ctr[25:22]; + // Tie GPIO0, keep board from rebooting + TRELLIS_SLICE #(.MODE("LOGIC"), .LUT0_INITVAL(16'hFFFF)) vcc (.F0(gpio0)); + endmodule diff --git a/ecp5/synth/ulx3s.v b/ecp5/synth/ulx3s.v index 25535e35..486366fa 100644 --- a/ecp5/synth/ulx3s.v +++ b/ecp5/synth/ulx3s.v @@ -1,15 +1,18 @@ -module top(input a_pin, output led_pin, output gpio0_pin); +module top(input a_pin, output led_pin, output led2_pin, output gpio0_pin); wire a; - wire led; + wire led, led2; wire gpio0; - (* BEL="X6/Y0/PIOB" *) (* IO_TYPE="LVCMOS33" *) + (* BEL="X90/Y65/PIOB" *) (* IO_TYPE="LVCMOS33" *) TRELLIS_IO #(.DIR("INPUT")) a_buf (.B(a_pin), .O(a)); (* BEL="X0/Y23/PIOC" *) (* IO_TYPE="LVCMOS33" *) TRELLIS_IO #(.DIR("OUTPUT")) led_buf (.B(led_pin), .I(led)); + (* BEL="X0/Y26/PIOA" *) (* IO_TYPE="LVCMOS33" *) + TRELLIS_IO #(.DIR("OUTPUT")) led2_buf (.B(led2_pin), .I(led2)); (* BEL="X0/Y62/PIOD" *) (* IO_TYPE="LVCMOS33" *) TRELLIS_IO #(.DIR("OUTPUT")) gpio0_buf (.B(gpio0_pin), .I(gpio0)); - assign led = !a; + assign led = a; + assign led2 = !a; TRELLIS_SLICE #(.MODE("LOGIC"), .LUT0_INITVAL(16'hFFFF)) vcc (.F0(gpio0)); endmodule |