diff options
Diffstat (limited to 'fpga_interchange/examples/tests')
6 files changed, 53 insertions, 1 deletions
diff --git a/fpga_interchange/examples/tests/counter/CMakeLists.txt b/fpga_interchange/examples/tests/counter/CMakeLists.txt index 91929f93..2e0eefcc 100644 --- a/fpga_interchange/examples/tests/counter/CMakeLists.txt +++ b/fpga_interchange/examples/tests/counter/CMakeLists.txt @@ -11,7 +11,7 @@ add_interchange_group_test( add_interchange_group_test( name counter family ${family} - board_list lifcl17 + board_list lifcl17 lifcl40evn tcl run_nexus.tcl sources counter.v techmap ../../remap_nexus.v diff --git a/fpga_interchange/examples/tests/counter/lifcl40evn.xdc b/fpga_interchange/examples/tests/counter/lifcl40evn.xdc new file mode 100644 index 00000000..4f378aef --- /dev/null +++ b/fpga_interchange/examples/tests/counter/lifcl40evn.xdc @@ -0,0 +1,13 @@ +set_property PACKAGE_PIN L13 [get_ports clk] +set_property PACKAGE_PIN G19 [get_ports rst] +set_property PACKAGE_PIN E17 [get_ports io_led[4]] +set_property PACKAGE_PIN F13 [get_ports io_led[5]] +set_property PACKAGE_PIN G13 [get_ports io_led[6]] +set_property PACKAGE_PIN F14 [get_ports io_led[7]] + +set_property IOSTANDARD LVCMOS33 [get_ports clk] +set_property IOSTANDARD LVCMOS33 [get_ports rst] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[4]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[5]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[6]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[7]] diff --git a/fpga_interchange/examples/tests/lut_nexus/CMakeLists.txt b/fpga_interchange/examples/tests/lut_nexus/CMakeLists.txt index 1c65d87e..7ca36343 100644 --- a/fpga_interchange/examples/tests/lut_nexus/CMakeLists.txt +++ b/fpga_interchange/examples/tests/lut_nexus/CMakeLists.txt @@ -8,3 +8,14 @@ add_interchange_test( sources lut.v skip_dcp ) + +add_interchange_test( + name lut_nexus40 + family ${family} + device LIFCL-40 + package CABGA400 + tcl run.tcl + xdc empty.xdc + sources lut.v + skip_dcp +) diff --git a/fpga_interchange/examples/tests/wire/CMakeLists.txt b/fpga_interchange/examples/tests/wire/CMakeLists.txt index 6308a6e9..9caffcd1 100644 --- a/fpga_interchange/examples/tests/wire/CMakeLists.txt +++ b/fpga_interchange/examples/tests/wire/CMakeLists.txt @@ -6,3 +6,12 @@ add_interchange_group_test( sources wire.v output_fasm ) + +add_interchange_group_test( + name wire + family ${family} + board_list lifcl40evn + tcl run_nexus.tcl + sources wire.v + skip_dcp +) diff --git a/fpga_interchange/examples/tests/wire/lifcl40evn.xdc b/fpga_interchange/examples/tests/wire/lifcl40evn.xdc new file mode 100644 index 00000000..c1a87488 --- /dev/null +++ b/fpga_interchange/examples/tests/wire/lifcl40evn.xdc @@ -0,0 +1,5 @@ +set_property PACKAGE_PIN G19 [get_ports i] +set_property PACKAGE_PIN E17 [get_ports o] + +set_property IOSTANDARD LVCMOS33 [get_ports i] +set_property IOSTANDARD LVCMOS33 [get_ports o] diff --git a/fpga_interchange/examples/tests/wire/run_nexus.tcl b/fpga_interchange/examples/tests/wire/run_nexus.tcl new file mode 100644 index 00000000..cddad3f8 --- /dev/null +++ b/fpga_interchange/examples/tests/wire/run_nexus.tcl @@ -0,0 +1,14 @@ +yosys -import + +read_verilog $::env(SOURCES) + +synth_nexus -nolutram -nowidelut -nobram -noccu2 -nodsp + +# opt_expr -undriven makes sure all nets are driven, if only by the $undef +# net. +opt_expr -undriven +opt_clean + +setundef -zero -params + +write_json $::env(OUT_JSON) |