diff options
Diffstat (limited to 'fpga_interchange')
| -rw-r--r-- | fpga_interchange/arch.h | 11 | ||||
| -rw-r--r-- | fpga_interchange/arch_pybindings.cc | 3 |
2 files changed, 0 insertions, 14 deletions
diff --git a/fpga_interchange/arch.h b/fpga_interchange/arch.h index b152bd0e..80eada4e 100644 --- a/fpga_interchange/arch.h +++ b/fpga_interchange/arch.h @@ -1280,17 +1280,6 @@ struct Arch : ArchAPI<ArchRanges> return bel_info(chip_info, bel).valid_cells[get_cell_type_index(cell_type)]; } - // Whether or not a given cell can be placed at a given Bel - // This is not intended for Bel type checks, but finer-grained constraints - // such as conflicting set/reset signals, etc - bool isValidBelForCell(CellInfo *cell, BelId bel) const override - { - NPNR_ASSERT(isValidBelForCellType(cell->type, bel)); - - // FIXME: Implement this - return true; - } - // Return true whether all Bels at a given location are valid bool isBelLocationValid(BelId bel) const override { diff --git a/fpga_interchange/arch_pybindings.cc b/fpga_interchange/arch_pybindings.cc index 416a015a..4fddad93 100644 --- a/fpga_interchange/arch_pybindings.cc +++ b/fpga_interchange/arch_pybindings.cc @@ -44,9 +44,6 @@ void arch_wrap_python(py::module &m) .def("place", &Context::place) .def("route", &Context::route); - fn_wrapper_2a<Context, decltype(&Context::isValidBelForCell), &Context::isValidBelForCell, pass_through<bool>, - addr_and_unwrap<CellInfo>, conv_from_str<BelId>>::def_wrap(ctx_cls, "isValidBelForCell"); - typedef std::unordered_map<IdString, std::unique_ptr<CellInfo>> CellMap; typedef std::unordered_map<IdString, std::unique_ptr<NetInfo>> NetMap; typedef std::unordered_map<IdString, IdString> AliasMap; |