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-rw-r--r--gowin/cells.cc37
1 files changed, 37 insertions, 0 deletions
diff --git a/gowin/cells.cc b/gowin/cells.cc
index a76ea1d8..ae420160 100644
--- a/gowin/cells.cc
+++ b/gowin/cells.cc
@@ -96,6 +96,19 @@ std::unique_ptr<CellInfo> create_generic_cell(Context *ctx, IdString type, std::
new_cell->addOutput(id_CLKOUTD);
new_cell->addOutput(id_CLKOUTD3);
new_cell->addOutput(id_LOCK);
+ } else if (type == id_PLLVR) {
+ for (IdString iid :
+ {id_CLKIN, id_CLKFB, id_FBDSEL0, id_FBDSEL1, id_FBDSEL2, id_FBDSEL3, id_FBDSEL4, id_FBDSEL5, id_IDSEL0,
+ id_IDSEL1, id_IDSEL2, id_IDSEL3, id_IDSEL4, id_IDSEL5, id_ODSEL0, id_ODSEL1, id_ODSEL2, id_ODSEL3,
+ id_ODSEL4, id_ODSEL5, id_PSDA0, id_PSDA1, id_PSDA2, id_PSDA3, id_DUTYDA0, id_DUTYDA1, id_DUTYDA2,
+ id_DUTYDA3, id_FDLY0, id_FDLY1, id_FDLY2, id_FDLY3, id_RESET, id_RESET_P, id_VREN}) {
+ new_cell->addInput(iid);
+ }
+ new_cell->addOutput(id_CLKOUT);
+ new_cell->addOutput(id_CLKOUTP);
+ new_cell->addOutput(id_CLKOUTD);
+ new_cell->addOutput(id_CLKOUTD3);
+ new_cell->addOutput(id_LOCK);
} else {
log_error("unable to create generic cell of type %s\n", type.c_str(ctx));
}
@@ -223,6 +236,30 @@ void reconnect_rpllb(Context *ctx, CellInfo *pll, CellInfo *pllb)
pll->movePortTo(ctx->id("ODSEL[5]"), pllb, id_ODSEL5);
}
+void reconnect_pllvr(Context *ctx, CellInfo *pll, CellInfo *new_pll)
+{
+ pll->movePortTo(id_CLKIN, new_pll, id_CLKIN);
+ pll->movePortTo(id_VREN, new_pll, id_VREN);
+ pll->movePortTo(id_CLKFB, new_pll, id_CLKFB);
+ pll->movePortTo(id_RESET, new_pll, id_RESET);
+ pll->movePortTo(id_RESET_P, new_pll, id_RESET_P);
+ for (int i = 0; i < 6; ++i) {
+ pll->movePortTo(ctx->idf("FBDSEL[%d]", i), new_pll, ctx->idf("FBDSEL%d", i));
+ pll->movePortTo(ctx->idf("IDSEL[%d]", i), new_pll, ctx->idf("IDSEL%d", i));
+ pll->movePortTo(ctx->idf("ODSEL[%d]", i), new_pll, ctx->idf("ODSEL%d", i));
+ if (i < 4) {
+ pll->movePortTo(ctx->idf("PSDA[%d]", i), new_pll, ctx->idf("PSDA%d", i));
+ pll->movePortTo(ctx->idf("DUTYDA[%d]", i), new_pll, ctx->idf("DUTYDA%d", i));
+ pll->movePortTo(ctx->idf("FDLY[%d]", i), new_pll, ctx->idf("FDLY%d", i));
+ }
+ }
+ pll->movePortTo(id_CLKOUT, new_pll, id_CLKOUT);
+ pll->movePortTo(id_CLKOUTP, new_pll, id_CLKOUTP);
+ pll->movePortTo(id_CLKOUTD, new_pll, id_CLKOUTD);
+ pll->movePortTo(id_CLKOUTD3, new_pll, id_CLKOUTD3);
+ pll->movePortTo(id_LOCK, new_pll, id_LOCK);
+}
+
void sram_to_ramw_split(Context *ctx, CellInfo *ram, CellInfo *ramw)
{
if (ramw->hierpath == IdString())