diff options
Diffstat (limited to 'ice40')
| -rw-r--r-- | ice40/chip.cc | 18 | ||||
| -rw-r--r-- | ice40/chip.h | 29 |
2 files changed, 25 insertions, 22 deletions
diff --git a/ice40/chip.cc b/ice40/chip.cc index 477df3d7..d92d61dd 100644 --- a/ice40/chip.cc +++ b/ice40/chip.cc @@ -82,19 +82,24 @@ Chip::Chip(ChipArgs args) : args(args) { #ifdef ICE40_HX1K_ONLY if (args.type == ChipArgs::HX1K) { - chip_info = reinterpret_cast<RelPtr<ChipInfoPOD>*>(chipdb_blob_1k)->get(); + chip_info = + reinterpret_cast<RelPtr<ChipInfoPOD> *>(chipdb_blob_1k)->get(); } else { log_error("Unsupported iCE40 chip type.\n"); } #else if (args.type == ChipArgs::LP384) { - chip_info = reinterpret_cast<RelPtr<ChipInfoPOD>*>(chipdb_blob_384)->get(); + chip_info = + reinterpret_cast<RelPtr<ChipInfoPOD> *>(chipdb_blob_384)->get(); } else if (args.type == ChipArgs::LP1K || args.type == ChipArgs::HX1K) { - chip_info = reinterpret_cast<RelPtr<ChipInfoPOD>*>(chipdb_blob_1k)->get(); + chip_info = + reinterpret_cast<RelPtr<ChipInfoPOD> *>(chipdb_blob_1k)->get(); } else if (args.type == ChipArgs::UP5K) { - chip_info = reinterpret_cast<RelPtr<ChipInfoPOD>*>(chipdb_blob_5k)->get(); + chip_info = + reinterpret_cast<RelPtr<ChipInfoPOD> *>(chipdb_blob_5k)->get(); } else if (args.type == ChipArgs::LP8K || args.type == ChipArgs::HX8K) { - chip_info = reinterpret_cast<RelPtr<ChipInfoPOD>*>(chipdb_blob_8k)->get(); + chip_info = + reinterpret_cast<RelPtr<ChipInfoPOD> *>(chipdb_blob_8k)->get(); } else { log_error("Unsupported iCE40 chip type.\n"); } @@ -190,7 +195,8 @@ WireId Chip::getWireBelPin(BelId bel, PortPin pin) const assert(bel != BelId()); int num_bel_wires = chip_info->bel_data[bel.index].num_bel_wires; - const BelWirePOD *bel_wires = chip_info->bel_data[bel.index].bel_wires.get(); + const BelWirePOD *bel_wires = + chip_info->bel_data[bel.index].bel_wires.get(); for (int i = 0; i < num_bel_wires; i++) if (bel_wires[i].port == pin) { diff --git a/ice40/chip.h b/ice40/chip.h index bb04c196..e6bb0a08 100644 --- a/ice40/chip.h +++ b/ice40/chip.h @@ -74,29 +74,26 @@ PortPin portPinFromId(IdString id); /**** Everything in this section must be kept in sync with chipdb.py ****/ -template <typename T> -struct RelPtr { +template <typename T> struct RelPtr +{ int32_t offset; // void set(const T *ptr) { - // offset = reinterpret_cast<const char*>(ptr) - reinterpret_cast<const char*>(this); + // offset = reinterpret_cast<const char*>(ptr) - + // reinterpret_cast<const char*>(this); // } - const T*get() const { - return reinterpret_cast<const T*>(reinterpret_cast<const char*>(this) + offset); + const T *get() const + { + return reinterpret_cast<const T *>( + reinterpret_cast<const char *>(this) + offset); } - const T&operator[](size_t index) const { - return get()[index]; - } + const T &operator[](size_t index) const { return get()[index]; } - const T&operator*() const { - return *(get()); - } + const T &operator*() const { return *(get()); } - const T*operator->() const { - return get(); - } + const T *operator->() const { return get(); } }; struct BelWirePOD @@ -566,8 +563,8 @@ struct Chip BelPinRange range; assert(wire != WireId()); range.b.ptr = chip_info->wire_data[wire.index].bels_downhill.get(); - range.e.ptr = - range.b.ptr + chip_info->wire_data[wire.index].num_bels_downhill; + range.e.ptr = range.b.ptr + + chip_info->wire_data[wire.index].num_bels_downhill; return range; } |