diff options
Diffstat (limited to 'ice40')
-rw-r--r-- | ice40/arch.cc | 21 | ||||
-rw-r--r-- | ice40/arch.h | 11 |
2 files changed, 32 insertions, 0 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc index 3dcd9cb0..0fb02758 100644 --- a/ice40/arch.cc +++ b/ice40/arch.cc @@ -415,4 +415,25 @@ std::vector<GraphicElement> Arch::getPipGraphics(PipId pip) const return ret; } +// ----------------------------------------------------------------------- + +bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, + IdString toPort, delay_t &delay) const +{ + // TODO + return false; +} + +IdString Arch::getPortClock(const CellInfo *cell, IdString port) const +{ + // TODO + return IdString(); +} + +bool Arch::isClockPort(const CellInfo *cell, IdString port) const +{ + // TODO + return false; +} + NEXTPNR_NAMESPACE_END diff --git a/ice40/arch.h b/ice40/arch.h index d9631c11..85fb9fc0 100644 --- a/ice40/arch.h +++ b/ice40/arch.h @@ -770,6 +770,17 @@ struct Arch : BaseCtx std::unordered_set<BelId> belGraphicsReload; std::unordered_set<WireId> wireGraphicsReload; std::unordered_set<PipId> pipGraphicsReload; + + // ------------------------------------------------- + + // Get the delay through a cell from one port to another, returning false + // if no path exists + bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, + delay_t &delay) const; + // Get the associated clock to a port, or empty if the port is combinational + IdString getPortClock(const CellInfo *cell, IdString port) const; + // Return true if a port is a clock + bool isClockPort(const CellInfo *cell, IdString port) const; }; NEXTPNR_NAMESPACE_END |