aboutsummaryrefslogtreecommitdiffstats
path: root/mistral/arch.cc
diff options
context:
space:
mode:
Diffstat (limited to 'mistral/arch.cc')
-rw-r--r--mistral/arch.cc5
1 files changed, 5 insertions, 0 deletions
diff --git a/mistral/arch.cc b/mistral/arch.cc
index e79a3910..46ed4f62 100644
--- a/mistral/arch.cc
+++ b/mistral/arch.cc
@@ -122,6 +122,9 @@ Arch::Arch(ArchArgs args)
CycloneV::pos2y(hps_pos[CycloneV::I_HPS_MPU_GENERAL_PURPOSE]));
}
+ for (auto m10k_pos : cyclonev->m10k_get_pos())
+ create_m10k(CycloneV::pos2x(m10k_pos), CycloneV::pos2y(m10k_pos));
+
// This import takes about 5s, perhaps long term we can speed it up, e.g. defer to Mistral more...
log_info("Initialising routing graph...\n");
int pip_count = 0;
@@ -407,6 +410,8 @@ void Arch::add_bel_pin(BelId bel, IdString pin, PortType dir, WireId wire)
void Arch::assign_default_pinmap(CellInfo *cell)
{
+ if (cell->type == id_MISTRAL_M10K)
+ return; // M10Ks always have a custom pinmap
for (auto &port : cell->ports) {
auto &pinmap = cell->pin_data[port.first].bel_pins;
if (!pinmap.empty())