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-rw-r--r--tests/ice40/up5k.cc44
1 files changed, 22 insertions, 22 deletions
diff --git a/tests/ice40/up5k.cc b/tests/ice40/up5k.cc
index 93d5f8a2..f6a58b3a 100644
--- a/tests/ice40/up5k.cc
+++ b/tests/ice40/up5k.cc
@@ -9,23 +9,23 @@ class UP5KTest : public ::testing::Test
protected:
virtual void SetUp()
{
- chipArgs.type = ChipArgs::UP5K;
+ chipArgs.type = ArchArgs::UP5K;
chipArgs.package = "sg48";
- design = new Design(chipArgs);
+ ctx = new Context(chipArgs);
}
- virtual void TearDown() { delete design; }
+ virtual void TearDown() { delete ctx; }
- ChipArgs chipArgs;
- Design *design;
+ ArchArgs chipArgs;
+ Context *ctx;
};
TEST_F(UP5KTest, bel_names)
{
int bel_count = 0;
- for (auto bel : design->chip.getBels()) {
- auto name = design->chip.getBelName(bel);
- ASSERT_EQ(bel, design->chip.getBelByName(name));
+ for (auto bel : ctx->getBels()) {
+ auto name = ctx->getBelName(bel);
+ ASSERT_EQ(bel, ctx->getBelByName(name));
bel_count++;
}
ASSERT_EQ(bel_count, 5414);
@@ -34,9 +34,9 @@ TEST_F(UP5KTest, bel_names)
TEST_F(UP5KTest, wire_names)
{
int wire_count = 0;
- for (auto wire : design->chip.getWires()) {
- auto name = design->chip.getWireName(wire);
- assert(wire == design->chip.getWireByName(name));
+ for (auto wire : ctx->getWires()) {
+ auto name = ctx->getWireName(wire);
+ assert(wire == ctx->getWireByName(name));
wire_count++;
}
ASSERT_EQ(wire_count, 103383);
@@ -45,9 +45,9 @@ TEST_F(UP5KTest, wire_names)
TEST_F(UP5KTest, pip_names)
{
int pip_count = 0;
- for (auto pip : design->chip.getPips()) {
- auto name = design->chip.getPipName(pip);
- assert(pip == design->chip.getPipByName(name));
+ for (auto pip : ctx->getPips()) {
+ auto name = ctx->getPipName(pip);
+ assert(pip == ctx->getPipByName(name));
pip_count++;
}
ASSERT_EQ(pip_count, 1219104);
@@ -55,11 +55,11 @@ TEST_F(UP5KTest, pip_names)
TEST_F(UP5KTest, uphill_to_downhill)
{
- for (auto dst : design->chip.getWires()) {
- for (auto uphill_pip : design->chip.getPipsUphill(dst)) {
+ for (auto dst : ctx->getWires()) {
+ for (auto uphill_pip : ctx->getPipsUphill(dst)) {
bool found_downhill = false;
- for (auto downhill_pip : design->chip.getPipsDownhill(
- design->chip.getPipSrcWire(uphill_pip))) {
+ for (auto downhill_pip : ctx->getPipsDownhill(
+ ctx->getPipSrcWire(uphill_pip))) {
if (uphill_pip == downhill_pip) {
ASSERT_FALSE(found_downhill);
found_downhill = true;
@@ -72,11 +72,11 @@ TEST_F(UP5KTest, uphill_to_downhill)
TEST_F(UP5KTest, downhill_to_uphill)
{
- for (auto dst : design->chip.getWires()) {
- for (auto downhill_pip : design->chip.getPipsDownhill(dst)) {
+ for (auto dst : ctx->getWires()) {
+ for (auto downhill_pip : ctx->getPipsDownhill(dst)) {
bool found_uphill = false;
- for (auto uphill_pip : design->chip.getPipsUphill(
- design->chip.getPipDstWire(downhill_pip))) {
+ for (auto uphill_pip : ctx->getPipsUphill(
+ ctx->getPipDstWire(downhill_pip))) {
if (uphill_pip == downhill_pip) {
ASSERT_FALSE(found_uphill);
found_uphill = true;