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* Merge pull request #135 from smunaut/ice40_typoDavid Shah2018-11-211-1/+1
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| * ice40/pll: Fix typo when testing for global port output netSylvain Munaut2018-11-201-1/+1
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* Merge pull request #133 from YosysHQ/yield_guiSerge Bazanski2018-11-201-0/+2
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| * Add missing router1 ctx->yield() callsClifford Wolf2018-11-201-0/+2
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* Merge pull request #131 from smunaut/ice40_fixesDavid Shah2018-11-2010-167/+422
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| * ice40: Add support for SB_RGBA_DRVSylvain Munaut2018-11-195-2/+58
| * ice40: Add global network output support for LFOSC/HFOSCSylvain Munaut2018-11-191-2/+10
| * ice40/pack: Add helper to constain cells that are unique in the FPGASylvain Munaut2018-11-191-0/+16
| * ice40: Add support for SB_GB_IOSylvain Munaut2018-11-195-8/+31
| * ice40: Add support for PLL global outputs via PADINSylvain Munaut2018-11-192-84/+73
| * ice40: Introduce the concept of forPadIn SB_GBSylvain Munaut2018-11-195-2/+53
| * ice40/chipdb: Add wires to global network for all cells that can drive itSylvain Munaut2018-11-193-6/+22
| * ice40: Add GlobalNetowkrInfo in the chip databaseSylvain Munaut2018-11-192-37/+63
| * ice40: Fix BEL validity check for PLL vs SB_IOSylvain Munaut2018-11-191-21/+20
| * ice40: Improve the is_sb_pll40_XXX predicates collectionSylvain Munaut2018-11-191-1/+13
| * ice40: Fix PLLTYPE for SB_PLL40_2F_PADSylvain Munaut2018-11-191-1/+1
| * ice40/pll: Add proper support for PLLOUT_SELECT_xxx attributesSylvain Munaut2018-11-191-0/+18
| * ice40: Make PLL default FEEDBACK_MODE to SIMPLESylvain Munaut2018-11-191-1/+1
| * ice40: Minor fix in predicate checking for logic portSylvain Munaut2018-11-191-2/+3
| * ice40/pack: Stop looking for BEL when we have one during PLL placementSylvain Munaut2018-11-191-0/+1
| * ice40/pack: Allow PLL to be constrained via 'BEL' attributesSylvain Munaut2018-11-191-0/+10
| * ice40/pack: Make sure we don't use a LOCKED bel when placing PLLSylvain Munaut2018-11-191-0/+2
| * ice40/arch: Add helper to check if a BEL is LOCKED or notSylvain Munaut2018-11-192-0/+21
| * ice40/chipdb: Fix LOCKED keyword support to include all packagesSylvain Munaut2018-11-191-1/+2
| * ice40/bitstream: Handle IoCtrl.IE_ polarity when configuring unused SB_IOSylvain Munaut2018-11-191-2/+7
* | Merge pull request #130 from smunaut/issue_127David Shah2018-11-202-8/+21
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| * | common/placer1: In random pick, only use grid if there is more than 64 BELsSylvain Munaut2018-11-192-8/+21
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* | Merge pull request #132 from maikmerten/masterDavid Shah2018-11-201-0/+10
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| * add "randomize-seed" command-line optionMaik Merten2018-11-191-0/+10
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* Merge pull request #124 from smunaut/ice40_warn_sbio_misuseDavid Shah2018-11-161-0/+5
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| * ice40: Add warning if an instanciated SB_IO has its PACKAGE_PIN used elsewhereSylvain Munaut2018-11-161-0/+5
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* Merge pull request #123 from smunaut/ice40_fix_line_endingsDavid Shah2018-11-161-1043/+1043
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| * ice40/bitstream: Convert to UNIX line endingsSylvain Munaut2018-11-161-1043/+1043
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* clangformatDavid Shah2018-11-1613-296/+463
* ice40: Remove unnecessary RAM assertionDavid Shah2018-11-161-1/+0
* Merge pull request #119 from cr1901/win-fixDavid Shah2018-11-164-2/+6
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| * Use native PATH environment-variable separator on Windows for PYTHONPATH. Fix...William D. Jones2018-11-031-0/+4
| * Rename io.{h,cc} to pio.{h,cc} to avoid naming conflict with Windows-provided...William D. Jones2018-11-033-2/+2
* | Merge pull request #118 from daveshah1/dcuDavid Shah2018-11-169-39/+935
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| * | ecp5: Better use of BoostDavid Shah2018-11-161-3/+3
| * | ecp5: Regression fix & formatDavid Shah2018-11-152-4/+14
| * | ecp5: Support LOC attribute on DCUsDavid Shah2018-11-151-1/+25
| * | ecp5: Add DCU availability checkDavid Shah2018-11-151-0/+2
| * | ecp5: Add timing info for SERDESDavid Shah2018-11-151-1/+26
| * | ecp5: DCU clocking fixesDavid Shah2018-11-151-2/+8
| * | ecp5: EXTREFB fixesDavid Shah2018-11-152-1/+5
| * | ecp5: clangformatDavid Shah2018-11-152-18/+23
| * | ecp5: Trim IO connected to top level portsDavid Shah2018-11-151-15/+73
| * | ecp5: Adding ancillary DCU belsDavid Shah2018-11-154-1/+57
| * | ecp5: remove debug and clangformatDavid Shah2018-11-153-10/+13