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* interchange: Fix nexus cmake review commentsgatecat2021-03-314-16/+11
* ci: Build prjoxide only for LIFCLgatecat2021-03-302-7/+8
* interchange: Split xc7 and nexus chipdb cmakegatecat2021-03-303-243/+245
* interchange: Add Nexus LUT testgatecat2021-03-308-20/+140
* interchange: Add Nexus to CIgatecat2021-03-305-2/+21
* interchange: Add CMake support for Nexus/prjoxidegatecat2021-03-303-0/+115
* Merge pull request #655 from YosysHQ/gatecat/alt-placer-fixgatecat2021-03-302-7/+8
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| * interchange: Fix illegal placementsgatecat2021-03-302-7/+8
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* nexus: Fix some IO FASM gengatecat2021-03-301-0/+4
* nexus: Fix LIFCL-17 LRAM FASMgatecat2021-03-301-0/+2
* nexus: Fix default IO configgatecat2021-03-291-0/+2
* Merge pull request #651 from YosysHQ/gatecat/nexus-vccogatecat2021-03-291-3/+51
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| * nexus: Fix bank Vcco FASMgatecat2021-03-291-3/+51
* | nexus: Default HF_OSC_EN to ENABLEDgatecat2021-03-291-1/+1
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* Merge pull request #645 from litghost/add_counter_and_ramgatecat2021-03-2923-337/+1221
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| * Update README with latest develpment progress.Keith Rothman2021-03-252-146/+39
| * interchange: Fix bug in site router where a bad solution isn't remove.Keith Rothman2021-03-251-3/+7
| * Implement debugging tools for site router.Keith Rothman2021-03-257-23/+166
| * Add some FIXME's around VCC assumption in LUT logic.Keith Rothman2021-03-251-0/+17
| * Add targets to generate YAML outputs for DeviceResource files.Keith Rothman2021-03-251-0/+22
| * Re-work LUT mapping logic to only put VCC pins when required.Keith Rothman2021-03-255-104/+174
| * Fixup some of the re-mapping logic.Keith Rothman2021-03-252-27/+75
| * Add initial handling of local site inverters and constant signals.Keith Rothman2021-03-258-60/+460
| * [FPGA interchange] Small fix to get_net_type.Keith Rothman2021-03-252-9/+14
| * Enable counter tests and add RAM tests.Keith Rothman2021-03-256-2/+284
* | Merge pull request #649 from acomodi/add-archcheck-to-all-testsgatecat2021-03-263-9/+41
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| * | gh-actions: better yosys caching based on versionAlessandro Comodi2021-03-262-6/+35
| * | interchange: add archcheck tests to all-device-test targetAlessandro Comodi2021-03-262-3/+6
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* | Merge pull request #650 from YosysHQ/gatecat/nexus-17k-fixesgatecat2021-03-261-1/+4
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| * nexus: Fix FASM gen for LIFCL-17gatecat2021-03-261-1/+4
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* Merge pull request #648 from YosysHQ/gatecat/nexus-get_pinsgatecat2021-03-251-7/+56
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| * nexus: Add support for get_pins PDC commandgatecat2021-03-251-7/+56
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* Merge pull request #628 from acomodi/add-interchange-devicesgatecat2021-03-2522-168/+450
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| * gh-actions: use ccache and build tools before running testsAlessandro Comodi2021-03-252-40/+105
| * gh-actions: interchange: multiple jobs, one for each deviceAlessandro Comodi2021-03-244-8/+17
| * interchange: examples: remove unused makefilesAlessandro Comodi2021-03-242-99/+0
| * interchange: devices: bel_bucket_seeds -> device_configAlessandro Comodi2021-03-233-3/+3
| * interchange: added boards and group testing across multiple boardsAlessandro Comodi2021-03-2310-45/+155
| * gh-actions: remove multi-process arch generationAlessandro Comodi2021-03-231-1/+1
| * fpga_interchange: add test data for new architecturesAlessandro Comodi2021-03-233-0/+108
| * fpga_interchange: use higher java heap spaceAlessandro Comodi2021-03-233-3/+4
| * fpga_interchange: add more devicesAlessandro Comodi2021-03-238-3/+91
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* Merge pull request #644 from litghost/add_global_buffersgatecat2021-03-235-11/+30
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| * [FPGA interchange] Add support for global buffers from chipdb.Keith Rothman2021-03-235-11/+30
* | Merge pull request #643 from litghost/id_constantsgatecat2021-03-232-4/+27
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| * | [FPGA interchange] Convert some string constants to IdString.Keith Rothman2021-03-232-4/+27
* | | Merge pull request #640 from litghost/inversion_logicgatecat2021-03-237-8/+131
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| * | Initial version of inverter logic.Keith Rothman2021-03-237-8/+131
* | | Merge pull request #639 from litghost/parameter_iterationgatecat2021-03-238-44/+446
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| * Update FPGA interchange chipdb to v4 with inverter data.Keith Rothman2021-03-231-1/+22