| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: gatecat <gatecat@ds0.me>
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command: Allow running Python on failure for state introspection
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Signed-off-by: gatecat <gatecat@ds0.me>
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gowin: Add constraints on primitive placement.
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Allow the registers of the same type or pairs shown below to be
placed in the same slide:
|--------|--------|
| DFFS | DFFR |
| DFFSE | DFFRE |
| DFFP | DFFC |
| DFFPE | DFFCE |
| DFFNS | DFFNR |
| DFFNSE | DFFNRE |
| DFFNP | DFFNC |
| DFFNPE | DFFNCE |
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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Added support for the INS_LOC instruction in the constraints file
(.CST), which is used to specify object placement.
Expanded treatment of IO_LOC/IO_PORT constraints, which now can
be applied to both ports and IO buffers.
Port constraints have priority.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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interchange: xdc: add more not_implemented commands
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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interchange: xdc: add common not_implemented function
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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interchange: place only cells belonging to the same clusters in the same site
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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Signed-off-by: gatecat <gatecat@ds0.me>
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python: Wrap PortRef by value
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Signed-off-by: gatecat <gatecat@ds0.me>
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mistral: Use MLABs as if they're LABs (for now)
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Signed-off-by: Lofty <dan.ravensloft@gmail.com>
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Signed-off-by: gatecat <gatecat@ds0.me>
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gowin: Add the IO[TRBL]style placement recognition
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Specifying pin placement with this notation (e.g. IOR4B) allows
to use the same constraint file without changes for different
packages and even different families.
The vendor router also understands this notation.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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python: Allow querying route delays
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Signed-off-by: gatecat <gatecat@ds0.me>
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Make EXTREFB handling more robust
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Avoids a segfault if an EXTREFB does not connect directly to its associated DCUA.
Also adds location constraints specifically for EXTREFB.
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pybindings: Fix mapping for PortRefVector
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This is used by net.users for instance.
Removed by mistake in 4ac00af6fadc0405867fdac84229d2cda390c108
Fixes #799
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
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router2: Improved bidir routing and timing-driven ripup option
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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mistral: Include mistral generated files in include dirs
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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ecp5: Enable OPENDRAIN on differential outputs
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