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* Add output of estimated total wire delay to router (as metric for placement q...Clifford Wolf2018-06-141-0/+49
* Increase ripup penalties over timeClifford Wolf2018-06-141-2/+8
* Add route-ripup routing loopClifford Wolf2018-06-141-31/+175
* Refactor position/delay estimation APIClifford Wolf2018-06-141-16/+13
* python: Clear SIGINT handler after Python loadsDavid Shah2018-06-141-0/+2
* Improve router error reportingClifford Wolf2018-06-131-4/+15
* Improve router error messagesClifford Wolf2018-06-131-5/+13
* Add support for CellInfo->pins in routerClifford Wolf2018-06-131-3/+15
* Fix router error handling for unplaced cellsClifford Wolf2018-06-131-2/+5
* Add A*-like optimizations to routerClifford Wolf2018-06-133-22/+69
* Remove IO buffers when fed by SB_IODavid Shah2018-06-131-9/+24
* reveresed logic for enabling main file, and made tests link arch filesMiodrag Milanovic2018-06-121-2/+2
* Fixing regression due to IDStringsDavid Shah2018-06-121-0/+7
* Minor clangformat changesClifford Wolf2018-06-122-4/+7
* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrClifford Wolf2018-06-122-1/+6
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| * Minimal Python bindings for IdStringDavid Shah2018-06-121-0/+5
| * ice40: Add support for LC placement constraints in packerDavid Shah2018-06-121-1/+1
* | Add fast IdString <-> PortPin conversionClifford Wolf2018-06-122-2/+12
* | Add proper fast IdStringClifford Wolf2018-06-122-12/+80
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* Add IdString APIClifford Wolf2018-06-123-11/+45
* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrClifford Wolf2018-06-122-1/+7
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| * Implement the placement validity checkerDavid Shah2018-06-121-1/+3
| * ice40: Start working on a packer, currently not testedDavid Shah2018-06-121-0/+4
* | Add nextpnr namespaceClifford Wolf2018-06-1215-34/+90
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* ice40: Adding cell utilities for packingDavid Shah2018-06-122-15/+27
* Adding some utilities for packingDavid Shah2018-06-122-0/+100
* Add "nextpnr.h"Clifford Wolf2018-06-119-55/+78
* Remove pool, dict, vector namespace aliasesClifford Wolf2018-06-113-17/+12
* Renamed LOC attribute to BEL, fix ice40 IO bel namesClifford Wolf2018-06-091-3/+3
* Adding basic placement constraintsDavid Shah2018-06-092-2/+40
* Add very basic routerClifford Wolf2018-06-093-3/+201
* Remove writing on sell types to cout (left over debug output?)Clifford Wolf2018-06-091-1/+0
* Improving the Python bindings, particularly the map/pair wrappersDavid Shah2018-06-082-6/+162
* python: Fixing builds as importable moduleDavid Shah2018-06-081-0/+4
* Reformat remaining filesDavid Shah2018-06-083-87/+100
* Applied clang-format to my own contributionsZipCPU2018-06-075-255/+255
* Adjusted info message names for rule-checker and parserZipCPU2018-06-071-1/+2
* Fix placer build for dummy archClifford Wolf2018-06-071-3/+3
* Moved placer definitions to place.h, main automatically runs placer nowZipCPU2018-06-072-3/+27
* Initial (random) placer capabilityZipCPU2018-06-072-5/+92
* Merge branch 'master' into gqtechZipCPU2018-06-076-127/+367
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| * Replacing Boost type_traits with stdDavid Shah2018-06-071-1/+1
| * Reformat Python bindings and ice40 mainDavid Shah2018-06-072-173/+177
| * Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrDavid Shah2018-06-073-60/+64
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| | * clang-format for design and chip codebaseClifford Wolf2018-06-072-59/+61
| | * Fix clang-format include order issuesClifford Wolf2018-06-071-1/+3
| * | Global design object workingDavid Shah2018-06-072-1/+7
| * | Working on global Python design objectDavid Shah2018-06-072-14/+49
| * | Developing Python bindings for Design and related typesDavid Shah2018-06-073-49/+179
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| * Adding Python to/from string wrappers for internal IDsDavid Shah2018-06-071-0/+48
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