| Commit message (Expand) | Author | Age | Files | Lines |
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| * | Update from increased clangformat line length | David Shah | 2018-06-23 | 1 | -4/+1 |
| * | clangformat cleanup | Miodrag Milanovic | 2018-06-23 | 1 | -15/+8 |
| * | Updates from clangformat | Clifford Wolf | 2018-06-23 | 2 | -12/+4 |
| * | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr | Clifford Wolf | 2018-06-23 | 2 | -5/+28 |
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| | * | Added BUILD_GUI, BUILD_PYTHON and BUILD_TESTS cmake options, | Miodrag Milanovic | 2018-06-23 | 2 | -5/+28 |
| * | | Refactoring bind/unbind API | Clifford Wolf | 2018-06-23 | 2 | -21/+21 |
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| * | Added custom QApplication implementation | Miodrag Milanovic | 2018-06-22 | 1 | -1/+2 |
| * | Switched from clifford@clifford.at to clifford@symbioticeda.com for copyright... | Clifford Wolf | 2018-06-22 | 6 | -6/+6 |
| * | log_error now trows exception, main is covering catch | Miodrag Milanovic | 2018-06-21 | 1 | -78/+87 |
| * | Cleanup parse_json_file API, some other cleanups | Clifford Wolf | 2018-06-21 | 1 | -1/+1 |
| * | Add ctx->checksum(), slightly improve log messages | Clifford Wolf | 2018-06-21 | 2 | -0/+10 |
| * | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr | Clifford Wolf | 2018-06-21 | 1 | -4/+83 |
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| | * | cleanup | Miodrag Milanovic | 2018-06-21 | 1 | -0/+2 |
| | * | make dummy target work as well | Miodrag Milanovic | 2018-06-21 | 1 | -4/+81 |
| * | | Improvements in router | Clifford Wolf | 2018-06-21 | 1 | -0/+1 |
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| * | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr | Clifford Wolf | 2018-06-20 | 2 | -0/+25 |
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| | * | Working on the timing budget annnotator | David Shah | 2018-06-20 | 2 | -5/+5 |
| | * | Adding stubs for delay annotation and cell timing lookup | David Shah | 2018-06-20 | 2 | -0/+25 |
| * | | Changes to estimatePosition API | Clifford Wolf | 2018-06-20 | 2 | -5/+5 |
| * | | Add better iCE40 delay estimates | Clifford Wolf | 2018-06-20 | 1 | -0/+2 |
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| * | Major performance improvement to placement validity check | David Shah | 2018-06-19 | 2 | -9/+20 |
| * | Refactor Arch/Context design hierarchy | Clifford Wolf | 2018-06-19 | 2 | -6/+13 |
| * | Getting rid of users of old IdString API | Clifford Wolf | 2018-06-18 | 1 | -6/+6 |
| * | Getting rid of users of old IdString API | Clifford Wolf | 2018-06-18 | 2 | -1/+4 |
| * | Towards IdString as per-context facility | Clifford Wolf | 2018-06-18 | 1 | -1/+1 |
| * | Rename chip.h to arch.h | Clifford Wolf | 2018-06-18 | 2 | -1/+1 |
| * | Updates from clangformat | Clifford Wolf | 2018-06-18 | 1 | -8/+2 |
| * | Rename Design to Context, derive from Arch instead of instantiating | Clifford Wolf | 2018-06-18 | 3 | -6/+6 |
| * | Rename Chip to Arch and ChipArgs to ArchArgs | Clifford Wolf | 2018-06-18 | 4 | -47/+45 |
| * | Improving code style and fixing dummy | David Shah | 2018-06-18 | 2 | -0/+8 |
| * | Some refactoring of Chip API (prep for chipdb refactoring) | Clifford Wolf | 2018-06-16 | 2 | -8/+10 |
| * | Refactor position/delay estimation API | Clifford Wolf | 2018-06-14 | 2 | -37/+7 |
| * | Update chip Graphics API | Clifford Wolf | 2018-06-13 | 2 | -5/+11 |
| * | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr | Clifford Wolf | 2018-06-13 | 1 | -1/+1 |
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| | * | reveresed logic for enabling main file, and made tests link arch files | Miodrag Milanovic | 2018-06-12 | 1 | -1/+1 |
| * | | Redesign PosInfo API | Clifford Wolf | 2018-06-13 | 2 | -3/+46 |
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| * | Add fast IdString <-> PortPin conversion | Clifford Wolf | 2018-06-12 | 1 | -0/+3 |
| * | Fix NEXTPNR_NAMESPACE | Clifford Wolf | 2018-06-12 | 2 | -0/+8 |
| * | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr | Clifford Wolf | 2018-06-12 | 2 | -0/+57 |
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| | * | Implement the placement validity checker | David Shah | 2018-06-12 | 2 | -0/+57 |
| * | | Add nextpnr namespace | Clifford Wolf | 2018-06-12 | 4 | -0/+14 |
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| * | Add "nextpnr.h" | Clifford Wolf | 2018-06-11 | 4 | -8/+7 |
| * | Remove pool, dict, vector namespace aliases | Clifford Wolf | 2018-06-11 | 2 | -42/+51 |
| * | Add conflicting=false argument to bind getters | Clifford Wolf | 2018-06-11 | 2 | -6/+7 |
| * | Draw fpga model | Miodrag Milanovic | 2018-06-10 | 1 | -0/+24 |
| * | Pass design to gui, display chip name | Miodrag Milanovic | 2018-06-10 | 3 | -1/+6 |
| * | Add dummy implementations of dummy Chip API | Clifford Wolf | 2018-06-09 | 2 | -1/+94 |
| * | Add very basic router | Clifford Wolf | 2018-06-09 | 1 | -8/+19 |
| * | python: Fixing builds as importable module | David Shah | 2018-06-08 | 1 | -0/+4 |
| * | Reformat remaining files | David Shah | 2018-06-08 | 1 | -4/+1 |
