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* Major performance improvement to placement validity checkDavid Shah2018-06-192-9/+20
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Refactor Arch/Context design hierarchyClifford Wolf2018-06-192-6/+13
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Getting rid of users of old IdString APIClifford Wolf2018-06-181-6/+6
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Getting rid of users of old IdString APIClifford Wolf2018-06-182-1/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Towards IdString as per-context facilityClifford Wolf2018-06-181-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Rename chip.h to arch.hClifford Wolf2018-06-182-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Updates from clangformatClifford Wolf2018-06-181-8/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Rename Design to Context, derive from Arch instead of instantiatingClifford Wolf2018-06-183-6/+6
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Rename Chip to Arch and ChipArgs to ArchArgsClifford Wolf2018-06-184-47/+45
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Improving code style and fixing dummyDavid Shah2018-06-182-0/+8
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Some refactoring of Chip API (prep for chipdb refactoring)Clifford Wolf2018-06-162-8/+10
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Refactor position/delay estimation APIClifford Wolf2018-06-142-37/+7
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Update chip Graphics APIClifford Wolf2018-06-132-5/+11
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrClifford Wolf2018-06-131-1/+1
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| * reveresed logic for enabling main file, and made tests link arch filesMiodrag Milanovic2018-06-121-1/+1
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* | Redesign PosInfo APIClifford Wolf2018-06-132-3/+46
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add fast IdString <-> PortPin conversionClifford Wolf2018-06-121-0/+3
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix NEXTPNR_NAMESPACEClifford Wolf2018-06-122-0/+8
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrClifford Wolf2018-06-122-0/+57
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| * Implement the placement validity checkerDavid Shah2018-06-122-0/+57
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | Add nextpnr namespaceClifford Wolf2018-06-124-0/+14
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add "nextpnr.h"Clifford Wolf2018-06-114-8/+7
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Remove pool, dict, vector namespace aliasesClifford Wolf2018-06-112-42/+51
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add conflicting=false argument to bind gettersClifford Wolf2018-06-112-6/+7
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Draw fpga modelMiodrag Milanovic2018-06-101-0/+24
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* Pass design to gui, display chip nameMiodrag Milanovic2018-06-103-1/+6
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* Add dummy implementations of dummy Chip APIClifford Wolf2018-06-092-1/+94
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add very basic routerClifford Wolf2018-06-091-8/+19
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* python: Fixing builds as importable moduleDavid Shah2018-06-081-0/+4
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Reformat remaining filesDavid Shah2018-06-081-4/+1
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Fix placer build for dummy archClifford Wolf2018-06-071-0/+11
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Reformat Python bindings and ice40 mainDavid Shah2018-06-072-7/+5
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* clang-format for design and chip codebaseClifford Wolf2018-06-072-50/+48
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix clang-format include order issuesClifford Wolf2018-06-071-0/+2
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add ice40 geometry informationClifford Wolf2018-06-061-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Update and simplify dummy archClifford Wolf2018-06-064-154/+38
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Initial GUI workMiodrag Milanovic2018-06-051-2/+8
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* Replace GuiLine with GraphicElementClifford Wolf2018-06-041-9/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Python bindings working on both architecturesDavid Shah2018-06-021-8/+2
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Simple Python test workingDavid Shah2018-06-021-0/+20
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Add architecture specific Python defsDavid Shah2018-06-021-0/+14
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Add a CMake based build systemDavid Shah2018-06-021-0/+0
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Add DelayInfo structClifford Wolf2018-05-291-1/+9
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Progress in chip.h APIClifford Wolf2018-05-261-4/+13
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add MakefileClifford Wolf2018-05-263-2/+40
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Directory structureClifford Wolf2018-05-263-0/+218
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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