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* ecp5: Add an error for out-of-sync constids and bbaDavid Shah2019-10-261-0/+3
* ecp5: Fix routing to shared DSP control inputsDavid Shah2019-10-251-1/+8
* ecp5: Preparations for new IO belsDavid Shah2019-10-091-0/+4
* ecp5: Adding support for 36-bit wide PDP RAMsDavid Shah2019-10-011-4/+17
* ecp5: Add full part name to bitstream headerDavid Shah2019-08-271-0/+20
* ecp5: Add GSR/SGSR supportDavid Shah2019-08-271-2/+6
* Merge pull request #309 from YosysHQ/dsptimingDavid Shah2019-08-091-1/+17
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| * ecp5: Conservative analysis of comb DSP timingDavid Shah2019-07-081-1/+17
* | ecp5: Add --out-of-context for building hard macrosDavid Shah2019-08-071-1/+7
* | ecp5: New Property interfaceDavid Shah2019-08-051-2/+2
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* Merge masterMiodrag Milanovic2019-06-251-3/+5
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| * ecp5: Delay tweaking for lower speed gradesDavid Shah2019-06-211-2/+4
| * ecp5: Reduce cfg.criticalityExponent for nowDavid Shah2019-06-211-1/+1
* | Use flags for each stepMiodrag Milanovic2019-06-141-2/+2
* | Save top level attrs and store current stepMiodrag Milanovic2019-06-071-0/+2
* | CleanupMiodrag Milanovic2019-06-071-11/+0
* | No need for this oneMiodrag Milanovic2019-06-071-4/+0
* | ecp5: Use an attribute to store is_globalDavid Shah2019-06-071-1/+2
* | WIP saving/loading attributesMiodrag Milanovic2019-06-071-0/+17
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* Add --placer option and refactor placer selectionDavid Shah2019-03-241-9/+21
* ecp5: Speedup cell delay lookupsDavid Shah2019-03-221-1/+7
* HeAP: Add PlacerHeapCfgDavid Shah2019-03-221-2/+5
* HeAP: Make HeAP placer optionalDavid Shah2019-03-221-1/+18
* HeAP: tidying upDavid Shah2019-03-221-1/+1
* HeAP: Use for ECP5 as well as iCE40David Shah2019-03-221-7/+2
* HeAP: Add TAUCS wrapper and integrationDavid Shah2019-03-221-1/+1
* ecp5: DELAY fixesDavid Shah2019-02-251-5/+1
* ecp5: Improve packing densityDavid Shah2019-02-251-1/+1
* ecp5: Add criticality-based LUT permutationDavid Shah2019-02-251-1/+11
* ecp5: Delay tuningDavid Shah2019-02-251-18/+31
* ecp5: Fix global clock routing with multiclock DPRAMDavid Shah2019-02-251-3/+6
* ecp5: Router performance improvementsDavid Shah2019-02-251-4/+17
* ecp5: Implement budget overrides for carry chains and SLICE muxesDavid Shah2019-02-251-2/+12
* ecp5: Improve delay modelDavid Shah2019-02-251-3/+4
* ecp5: Speed up timing analysisDavid Shah2019-02-251-4/+3
* ecp5: Add ECLKSYNCB supportDavid Shah2019-02-241-0/+4
* ecp5: Packing of ODDRX2FDavid Shah2019-02-241-0/+2
* ecp5: Helper functions for DQS and ECLKDavid Shah2019-02-241-0/+37
* ecp5: Add timing data for DQS-related cellsDavid Shah2019-02-241-0/+27
* Merge branch 'master' into mmaped_chipdbMiodrag Milanović2019-02-121-1/+22
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| * ecp5: Fix global routing performanceDavid Shah2019-02-121-1/+22
* | Load chipdb from filesystem as optionMiodrag Milanovic2019-02-091-1/+28
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* ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGGDavid Shah2019-02-081-0/+17
* ecp5: Add IOLOGIC timing and bitstream; ODDR workingDavid Shah2018-12-141-0/+20
* Improve reporting of unknown cell typesDavid Shah2018-11-291-1/+2
* ecp5: Adding mux support up to LUT6David Shah2018-11-161-1/+2
* ecp5: clangformat timing changesDavid Shah2018-11-161-1/+1
* ecp5: Use speed-grade-specific delay estimateDavid Shah2018-11-161-2/+2
* ecp5: Fix db import, improve timing data debuggingDavid Shah2018-11-161-1/+28
* ecp5: Post-rebase fixDavid Shah2018-11-161-3/+3
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