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* ecp5: Derived constraint support for PLLs, clock dividers and oscillatorsDavid Shah2019-02-241-3/+4
* ecp5: Fixes for litedramDavid Shah2019-02-241-8/+12
* ecp5: Add DIFFRESISTOR supportDavid Shah2019-02-241-0/+2
* ecp5: Add support for referenced inputsDavid Shah2019-02-241-5/+58
* ecp5: Add DELAYF/DELAYG supportDavid Shah2019-02-241-12/+16
* ecp5: Add TERMINATION supportDavid Shah2019-02-241-0/+16
* ecp5: Add DDRDLLA supportDavid Shah2019-02-241-0/+12
* ecp5: Add ECLKSYNCB supportDavid Shah2019-02-241-0/+7
* ecp5: Helper functions and bitstream for DQSDavid Shah2019-02-241-0/+30
* ecp5: Packing of ODDRX2FDavid Shah2019-02-241-0/+1
* ecp5: Fix typoDavid Shah2019-02-141-0/+1
* ecp5: Embed baseconfigDavid Shah2019-02-081-2/+42
* ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGGDavid Shah2019-02-081-0/+29
* ecp5: Add PULLMODE supportDavid Shah2019-01-071-0/+2
* ecp5: Add IOLOGIC timing and bitstream; ODDR workingDavid Shah2018-12-141-0/+18
* ecp5: Fix UR PLL tile coordinatesDavid Shah2018-11-261-2/+2
* clangformatDavid Shah2018-11-161-2/+2
* Merge pull request #119 from cr1901/win-fixDavid Shah2018-11-161-1/+1
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| * Rename io.{h,cc} to pio.{h,cc} to avoid naming conflict with Windows-provided...William D. Jones2018-11-031-1/+1
* | ecp5: Better use of BoostDavid Shah2018-11-161-3/+3
* | ecp5: Regression fix & formatDavid Shah2018-11-151-1/+2
* | ecp5: clangformatDavid Shah2018-11-151-5/+9
* | ecp5: Adding ancillary DCU belsDavid Shah2018-11-151-0/+17
* | ecp5: remove debug and clangformatDavid Shah2018-11-151-4/+5
* | dcu: Fix bitstream param handlingDavid Shah2018-11-151-0/+1
* | ecp5: Working on DCUDavid Shah2018-11-151-5/+39
* | ecp5: DCU bitstream gen handlingDavid Shah2018-11-151-0/+45
* | ecp5: Groundwork for DCU supportDavid Shah2018-11-151-13/+10
* | ecp5: Fix 85k PLL_LRDavid Shah2018-11-111-1/+2
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* ecp5: Allow setting IO SLEWRATEDavid Shah2018-11-011-0/+2
* ecp5: Add PLL supportDavid Shah2018-10-311-4/+133
* ecp5: DSP fixesDavid Shah2018-10-221-32/+39
* ecp5: Working on DSPsDavid Shah2018-10-221-82/+148
* ecp5: Adding DSP supportDavid Shah2018-10-211-0/+179
* clangformatDavid Shah2018-10-161-3/+5
* ecp5: Add support for correct tile naming in all variantsDavid Shah2018-10-161-1/+33
* ecp5: Fix BRAM tile namesDavid Shah2018-10-111-1/+1
* ecp5: Fixing BRAM initialisationDavid Shah2018-10-101-4/+14
* ecp5: Working on BRAM initialisationDavid Shah2018-10-091-0/+57
* ecp5: BRAM improvements with constant/inverted inputsDavid Shah2018-10-061-14/+63
* ecp5: Fixing EBR constant tie-offsDavid Shah2018-10-051-1/+2
* ecp5: Bitstream gen for DP16KD BRAMDavid Shah2018-10-051-0/+98
* ecp5: Infrastructure for BRAM bitstream genDavid Shah2018-10-051-0/+25
* ecp5: Negative clock support, general slice improvementsDavid Shah2018-10-021-2/+23
* clangformatDavid Shah2018-10-011-3/+1
* ecp5: Debugging DRAM packingDavid Shah2018-10-011-0/+9
* ecp5: Improve mixed no-FF/FF placementDavid Shah2018-09-301-11/+16
* ecp5: Relative placement and bitstream gen for carriesDavid Shah2018-09-301-1/+16
* ecp5: Global router produces a working bitstreamDavid Shah2018-09-291-0/+2
* API change: Use CellInfo* and NetInfo* as cell/net handles (ECP5)David Shah2018-08-051-3/+3
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