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| * Rearrange bool algebraRoss Schlaikjer2020-04-071-2/+2
| * Actually just move all the logic to ArchInfoRoss Schlaikjer2020-04-071-2/+13
| * Extract regmode configuration to ArchInfoRoss Schlaikjer2020-04-071-0/+10
* | ecp5: Allow use of IDDRXN and ODDRXN type primitives on the same pinDavid Shah2020-04-031-0/+10
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* ecp5: Fix tieoff of unused DELAY signalsDavid Shah2020-01-211-3/+3
* ecp5: Add support for flipflops with preloadDavid Shah2019-12-071-2/+6
* ecp5: Fix placement of DDRDLLADavid Shah2019-11-291-0/+26
* ecp5: Improve flipflop packing densityDavid Shah2019-11-201-0/+153
* ecp5: Fix handling of custom DEL_VALUEDavid Shah2019-11-181-1/+2
* ecp5: Add logic utilisation before packing statisticsDavid Shah2019-11-181-0/+45
* Merge pull request #345 from YosysHQ/dave/sdfDavid Shah2019-11-181-11/+3
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| * ecp5: Preserve top level IO properlyDavid Shah2019-10-181-11/+3
* | ecp5: Copy timing constraints across ECLKBRIDGECSDavid Shah2019-11-011-1/+4
* | ecp5: Fix placement of ECLKBRIDGECSDavid Shah2019-11-011-11/+41
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* ecp5: Add support for ECLKBRIDGECSDavid Shah2019-10-111-1/+52
* ecp5: Fix tristate IO registersDavid Shah2019-10-091-3/+9
* ecp5: Add support for IO registersDavid Shah2019-10-091-0/+97
* ecp5: Add IDDR71B supportDavid Shah2019-10-091-3/+15
* ecp5: Add ODDR71B supportDavid Shah2019-10-091-3/+14
* ecp5: Fix parametersDavid Shah2019-10-041-0/+4
* ecp5: Adding support for 36-bit wide PDP RAMsDavid Shah2019-10-011-0/+53
* ecp5: Move clock constraints across IO and DCCADavid Shah2019-09-131-0/+9
* ecp5: Add GSR/SGSR supportDavid Shah2019-08-271-0/+11
* ecp5: Add --out-of-context for building hard macrosDavid Shah2019-08-071-1/+7
* ecp5: Add a check for legacy parameter valuesDavid Shah2019-08-061-0/+12
* ecp5: New Property interfaceDavid Shah2019-08-051-62/+66
* ecp5: Fix missing LUT inputs, fixes #301David Shah2019-07-101-0/+4
* Use flags for each stepMiodrag Milanovic2019-06-141-1/+1
* Save top level attrs and store current stepMiodrag Milanovic2019-06-071-0/+1
* ecp5: Use an attribute to store is_globalDavid Shah2019-06-071-2/+6
* WIP saving/loading attributesMiodrag Milanovic2019-06-071-0/+1
* Added support for attributes/properties typesMiodrag Milanovic2019-06-011-1/+1
* ecp5: Fix USRMCLK primitiveDavid Shah2019-05-101-0/+14
* ecp5: DELAY fixesDavid Shah2019-02-251-11/+10
* ecp5: Improve packing densityDavid Shah2019-02-251-0/+58
* ecp5: Add criticality-based LUT permutationDavid Shah2019-02-251-0/+1
* ecp5: Speed up timing analysisDavid Shah2019-02-251-0/+3
* ecp5: DELAYF/G fixesDavid Shah2019-02-241-2/+2
* ecp5: Connect unused DQSBUF inputs to GNDDavid Shah2019-02-241-14/+30
* ecp5: Compute derived constraints iterativelyDavid Shah2019-02-241-52/+79
* ecp5: Derived constraint support for PLLs, clock dividers and oscillatorsDavid Shah2019-02-241-0/+115
* ecp5: Fixes for litedramDavid Shah2019-02-241-0/+5
* ecp5: Add DELAYF/DELAYG supportDavid Shah2019-02-241-1/+122
* ecp5: Add DDRDLLA supportDavid Shah2019-02-241-0/+30
* ecp5: Add ECLKSYNCB supportDavid Shah2019-02-241-2/+23
* ecp5: Add TSHX2DQSA supportDavid Shah2019-02-241-4/+5
* ecp5: Add TSHX2DQA supportDavid Shah2019-02-241-1/+30
* ecp5: Add IDDRX2DQA supportDavid Shah2019-02-241-0/+30
* ecp5: Add ODDRX2DQSB suppportDavid Shah2019-02-241-4/+4
* ecp5: Add ODDRX2DQA supportDavid Shah2019-02-241-3/+36
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