Commit message (Collapse) | Author | Age | Files | Lines | ||
---|---|---|---|---|---|---|
... | ||||||
* | Merge pull request #228 from YosysHQ/ecp5_embed_base | David Shah | 2019-02-14 | 3 | -4/+2683 | |
|\ | | | | | ecp5: Embed baseconfigs in nextpnr | |||||
| * | ecp5: Add --basecfg deprecation warning | David Shah | 2019-02-08 | 1 | -2/+11 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| * | ecp5: Embed baseconfig | David Shah | 2019-02-08 | 2 | -2/+2672 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | | Merge branch 'master' into mmaped_chipdb | Miodrag Milanović | 2019-02-12 | 2 | -5/+33 | |
|\ \ | ||||||
| * | | ecp5: Fix global routing performance | David Shah | 2019-02-12 | 1 | -1/+22 | |
| | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| * | | ecp5: cmake: Search for pytrellis.so in multiple locations | Gabriel L. Somlo | 2019-02-10 | 1 | -4/+11 | |
| |/ | | | | | | | | | | | | | | | | | | | | | If a distro-specific "trellis-devel" package is used, the pytrellis.so library might be located in a dedicated directory, rather than under TRELLIS_ROOT. Search for pytrellis.so in a list of directories, then subsequently use the first match as part of PYTHONPATH. Signed-off-by: Gabriel Somlo <gsomlo@gmail.com> | |||||
* | | Fix according to comments on PR | Miodrag Milanovic | 2019-02-10 | 1 | -1/+1 | |
| | | ||||||
* | | Load chipdb from filesystem as option | Miodrag Milanovic | 2019-02-09 | 3 | -65/+93 | |
|/ | ||||||
* | Merge branch 'ecp5func' | David Shah | 2019-02-08 | 4 | -1/+156 | |
|\ | ||||||
| * | ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGG | David Shah | 2019-02-08 | 4 | -1/+156 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | | Merge pull request #210 from twam/master | David Shah | 2019-01-27 | 1 | -3/+3 | |
|\ \ | |/ |/| | Search for trellis in /usr/local/share/trellis if not specified with … | |||||
| * | Search for trellis in /usr/local/share/trellis if not specified with ↵ | Tobias Müller | 2019-01-13 | 1 | -3/+3 | |
| | | | | | | | | -DTRELLIS_ROOT | |||||
* | | Make cross compile possible for mingw | Miodrag Milanovic | 2019-01-27 | 1 | -1/+1 | |
|/ | ||||||
* | ecp5: Add PULLMODE support | David Shah | 2019-01-07 | 1 | -0/+2 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Check for incorrect use of TRELLIS_IO 'B' pin | David Shah | 2018-12-25 | 1 | -0/+9 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Fix tristate IO insertion | David Shah | 2018-12-22 | 1 | -1/+1 | |
| | | | | | | Fixes #191 Signed-off-by: David Shah <davey1576@gmail.com> | |||||
* | ecp5: Fix ODDR when used with manually instantiated TRELLIS_IO | David Shah | 2018-12-19 | 1 | -0/+4 | |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | |||||
* | ecp5: Fix IOLOGIC ports at the same constant value | David Shah | 2018-12-15 | 1 | -2/+12 | |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | |||||
* | ecp5: Add IOLOGIC timing and bitstream; ODDR working | David Shah | 2018-12-14 | 4 | -24/+71 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Add ODDR packing | David Shah | 2018-12-14 | 2 | -1/+25 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Adding IOLOGIC packing | David Shah | 2018-12-14 | 2 | -11/+109 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Add {S}IOLOGIC constids and cell | David Shah | 2018-12-12 | 2 | -0/+86 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | Merge pull request #159 from YosysHQ/ecp5_pllplace | David Shah | 2018-12-01 | 2 | -2/+59 | |
|\ | | | | | ecp5: Pre-place PLLs and use dedicated routes into globals | |||||
| * | ecp5: Pre-place PLLs and use dedicated routes into globals | David Shah | 2018-11-30 | 2 | -2/+59 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | | Improve reporting of unknown cell types | David Shah | 2018-11-29 | 1 | -1/+2 | |
|/ | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Fix UR PLL tile coordinates | David Shah | 2018-11-26 | 1 | -2/+2 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | Merge pull request #143 from daveshah1/ecp5_muxes | David Shah | 2018-11-26 | 5 | -6/+169 | |
|\ | | | | | ecp5: Adding support for LUT extension muxes up to LUT7 | |||||
| * | ecp5: Add support for LUT7 mux | David Shah | 2018-11-18 | 1 | -6/+116 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| * | ecp5: More optimal LUT6 placement | David Shah | 2018-11-16 | 3 | -1/+11 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| * | ecp5: Adding mux support up to LUT6 | David Shah | 2018-11-16 | 3 | -6/+49 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | | python: Fixes to get net wires map working | David Shah | 2018-11-22 | 1 | -2/+24 | |
|/ | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Add 10% safety margin to pip delays | David Shah | 2018-11-16 | 1 | -2/+2 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: clangformat timing changes | David Shah | 2018-11-16 | 3 | -17/+18 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Use speed-grade-specific delay estimate | David Shah | 2018-11-16 | 1 | -2/+2 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Fix db import, improve timing data debugging | David Shah | 2018-11-16 | 3 | -4/+40 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Allow selection of device speed grade | David Shah | 2018-11-16 | 1 | -3/+26 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Post-rebase fix | David Shah | 2018-11-16 | 1 | -3/+3 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Consider fanout when calculating pip delays | David Shah | 2018-11-16 | 1 | -2/+12 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Fix timing pip classes | David Shah | 2018-11-16 | 1 | -1/+1 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Use new timing data | David Shah | 2018-11-16 | 4 | -94/+82 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Fix timing data import | David Shah | 2018-11-16 | 1 | -5/+16 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ecp5: Adding real timing data to database | David Shah | 2018-11-16 | 6 | -49/+202 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | clangformat | David Shah | 2018-11-16 | 2 | -172/+342 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | Merge pull request #119 from cr1901/win-fix | David Shah | 2018-11-16 | 4 | -2/+6 | |
|\ | | | | | nextpnr-ecp5 Windows Fixes | |||||
| * | Use native PATH environment-variable separator on Windows for PYTHONPATH. ↵ | William D. Jones | 2018-11-03 | 1 | -0/+4 | |
| | | | | | | | | | | | | Fixes 'Bad address' error in cmake. Signed-off-by: William D. Jones <thor0505@comcast.net> | |||||
| * | Rename io.{h,cc} to pio.{h,cc} to avoid naming conflict with ↵ | William D. Jones | 2018-11-03 | 3 | -2/+2 | |
| | | | | | | | | | | | | Windows-provided io.h. Signed-off-by: William D. Jones <thor0505@comcast.net> | |||||
* | | ecp5: Better use of Boost | David Shah | 2018-11-16 | 1 | -3/+3 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | | ecp5: Regression fix & format | David Shah | 2018-11-15 | 2 | -4/+14 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | | ecp5: Support LOC attribute on DCUs | David Shah | 2018-11-15 | 1 | -1/+25 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | | ecp5: Add DCU availability check | David Shah | 2018-11-15 | 1 | -0/+2 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> |