Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Remove isValidBelForCell | gatecat | 2021-02-16 | 1 | -3/+0 |
* | Update copywrite headers. | Keith Rothman | 2021-02-04 | 1 | -0/+1 |
* | Add initial updates to FPGA interchange arch for BEL buckets. | Keith Rothman | 2021-02-04 | 1 | -0/+2 |
* | Initial FPGA interchange (which is just a cut-down xilinx arch). | Keith Rothman | 2021-02-04 | 1 | -0/+74 |