| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Fix assorted bugs in FPGA interchange. | Keith Rothman | 2021-02-23 | 1 | -11/+41 |
| * | Working FF example now that constant merging is done. | Keith Rothman | 2021-02-23 | 1 | -2/+11 |
| * | Add initial logic for handling dedicated interconnect situations. | Keith Rothman | 2021-02-23 | 1 | -21/+34 |
| * | Initial working constant network support! | Keith Rothman | 2021-02-23 | 1 | -9/+106 |
| * | Fix sign mismatch. | Keith Rothman | 2021-02-18 | 1 | -1/+1 |
| * | Emit fixed attributes to output physical netlist. | Keith Rothman | 2021-02-17 | 1 | -8/+19 |
| * | Continue fixes. | Keith Rothman | 2021-02-17 | 1 | -10/+49 |
| * | Disable traversal limit when reading logical netlist. | Keith Rothman | 2021-02-17 | 1 | -1/+3 |
| * | Small fixes from review. | Keith Rothman | 2021-02-15 | 1 | -1/+1 |
| * | Add FPGA interchange frontend and backend. | Keith Rothman | 2021-02-15 | 1 | -0/+826 |
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index : iCE40/nextpnr | |
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