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path: root/fpga_interchange/fpga_interchange.cpp
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* interchange: Handle disconnected/missing cell pinsgatecat2021-04-191-6/+0
* Add initial handling of local site inverters and constant signals.Keith Rothman2021-03-251-7/+29
* Correct some bugs in writing of physical netlist w.r.t. site sources.Keith Rothman2021-03-221-11/+93
* Fix compiler warnings introduced by -Wextragatecat2021-02-251-1/+1
* Fix assorted bugs in FPGA interchange.Keith Rothman2021-02-231-11/+41
* Working FF example now that constant merging is done.Keith Rothman2021-02-231-2/+11
* Add initial logic for handling dedicated interconnect situations.Keith Rothman2021-02-231-21/+34
* Initial working constant network support!Keith Rothman2021-02-231-9/+106
* Fix sign mismatch.Keith Rothman2021-02-181-1/+1
* Emit fixed attributes to output physical netlist.Keith Rothman2021-02-171-8/+19
* Continue fixes.Keith Rothman2021-02-171-10/+49
* Disable traversal limit when reading logical netlist.Keith Rothman2021-02-171-1/+3
* Small fixes from review.Keith Rothman2021-02-151-1/+1
* Add FPGA interchange frontend and backend.Keith Rothman2021-02-151-0/+826