iCE40/nextpnr - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	refactor: New member functions to replace design_utils	gatecat	2022-02-18	1	-1/+1
*	clangformat	gatecat	2021-09-06	1	-2/+4
*	interchange: entirely disable cache when binding site routing	Alessandro Comodi	2021-08-31	1	-6/+6
*	Merge pull request #757 from antmicro/lut-mapping-cache	gatecat	2021-07-22	1	-25/+55
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\| *	Added an option to disable the LUT mapping cache	Maciej Kurc	2021-07-22	1	-2/+5
\| *	Added more code comments, formatted the code	Maciej Kurc	2021-07-22	1	-4/+1
\| *	Working site LUT mapping cache	Maciej Kurc	2021-07-16	1	-26/+56
* \|	interchange: Fix preferred constant handling when canInvert	gatecat	2021-07-20	1	-1/+10
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*	interchange: Handle canInvert PIPs when processing preferred constants	gatecat	2021-07-01	1	-5/+9
*	interchange: Reserve site ports only reachable from dedicated routing	gatecat	2021-07-01	1	-0/+59
*	interchange: Cope with undriven nets in more places	gatecat	2021-06-14	1	-0/+4
*	interchange: clusters: adjust comments	Alessandro Comodi	2021-06-11	1	-1/+4
*	interchange: add support for generating BEL clusters	Alessandro Comodi	2021-06-11	1	-2/+44
*	Using hashlib in arches	gatecat	2021-06-02	1	-14/+10
*	interchange: Don't error out on missing cell ports	gatecat	2021-05-21	1	-2/+1
*	Run clangformat	gatecat	2021-05-16	1	-3/+6
*	interchange: pseudo pips: fix illegal tile pseudo PIPs	Alessandro Comodi	2021-05-14	1	-6/+24
*	interchange: site router: add valid pips list to check during routing	Alessandro Comodi	2021-05-13	1	-0/+43
*	interchange: site router: fix log messages	Alessandro Comodi	2021-05-10	1	-3/+3
*	interchange: site router: fix illegal site thru paths	Alessandro Comodi	2021-05-10	1	-0/+12
*	Hash table refactoring	gatecat	2021-04-14	1	-4/+4
*	clangformat	gatecat	2021-04-12	1	-10/+12
*	[interchange] Fix invalid use of local variables due to refactoring.	Keith Rothman	2021-04-06	1	-6/+1
*	[interchange] Prevent site router from generating incorrect LUTs.	Keith Rothman	2021-04-06	1	-34/+86
*	[interchange] Add some documentation for the site router.	Keith Rothman	2021-04-05	1	-10/+58
*	interchange: Fix bug in site router where a bad solution isn't remove.	Keith Rothman	2021-03-25	1	-3/+7
*	Implement debugging tools for site router.	Keith Rothman	2021-03-25	1	-13/+67
*	Add initial handling of local site inverters and constant signals.	Keith Rothman	2021-03-25	1	-31/+294
*	[FPGA interchange] Small fix to get_net_type.	Keith Rothman	2021-03-25	1	-6/+6
*	Merge pull request #640 from litghost/inversion_logic	gatecat	2021-03-23	1	-8/+18
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\| *	Initial version of inverter logic.	Keith Rothman	2021-03-23	1	-8/+18
* \|	interchange: Add nice error for missing cell pins	gatecat	2021-03-23	1	-0/+3
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*	Rework FPGA interchange site router.	Keith Rothman	2021-03-22	1	-567/+528
*	For now just return false in the site router.	Keith Rothman	2021-02-26	1	-1/+1
*	Initial LUT rotation logic.	Keith Rothman	2021-02-26	1	-5/+30
*	Fix assorted bugs in FPGA interchange.	Keith Rothman	2021-02-23	1	-10/+76
*	Add initial logic for handling dedicated interconnect situations.	Keith Rothman	2021-02-23	1	-0/+6
*	Do some spell checking on site_router.cc	Keith Rothman	2021-02-18	1	-18/+18
*	Add some utility methods for site instance access.	Keith Rothman	2021-02-18	1	-6/+3
*	Add initial site router.	Keith Rothman	2021-02-17	1	-0/+753