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* gowin: Use local aliasesYRabbit2022-06-091-7/+11
| | | | | | | | | | | | | | | | | | In the Gowin chips, the tiles are connected to each other by a one-hop wire, among others. There are 4 one-hop wires, of which 2 are shared between north/south and east/west, have three names: e.g. SN10 and N110 and S110. But only one of them, the first, occurs as a sink for PIP, that is, you can not get a route that would pass through the S110 for example. This commit corrects the names to SN?0 and EW?0 at the wire creation stage to avoid dead wires. In addition, the SN?0 and EW?0 are among the few sinks for global clock wires and now there is the possibility of a more optimal clock routing. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* gowin: Add support for long wiresYRabbit2022-05-275-8/+299
| | | | | | | | | | | | | | | | | | | | | | Gowin chips have a highly sophisticated system of long wires that are wired to each cell and allow the clock or logic to spread quickly. This commit implements some of the capabilities of the long wire system for quadrants, leaving out the fine-tuning of them for each column. To make use of the long wire system, the specified wire is cut at the driver and a special cell is placed between the driver and the rest of the wire. * VCC and GND can not use long wires because they are in every cell and there is no point in using a net * Long wire numbers can be specified manually or assigned automatically. * The route from the driver to the port of the new cell can be quite long, this will have to be solved somehow. * It might make sense to add a mechanism for automatically finding candidates for long wires. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* gowin: Add initial syntax support for long wiresYRabbit2022-05-021-7/+27
| | | | | | | Only the recognition of the directive in the .CST file and elementary checks are added, but not the long-wire mechanism itself. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* gowin: handle the GW1N-9 feature.YRabbit2022-04-034-2/+40
| | | | | | | | This chip has a different default state for one type of I/O buffer --- you have to explicitly switch it to the normal state by feeding VCC/VSS to certain inputs. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* gowin: Fix z-index of oscillatorTim Pambor2022-03-302-5/+6
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* gowin: Add bels for oscillatorTim Pambor2022-03-272-0/+46
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* gowin: Consider the peculiarity of GW1BR-9CYRabbit2022-03-264-0/+27
| | | | | | | The GW1NR-9C chip ODDR implementation differs from all other supported chips by two suspicious inputs. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* gowin: Name the constants (#958)YRabbit2022-03-211-2/+2
| | | | | Place arbitrary constants side by side to avoid conflicts. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Gowin: use global VCC and VSS nets (#956)Pepijn de Vos2022-03-194-10/+22
| | | | | | | * use global VCC and VSS nets * derp * remove init parameter
* gowin: don't crash if no arguments are setYRabbit2022-03-161-0/+4
| | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Merge pull request #943 from yrabbit/localegatecat2022-03-151-0/+1
|\ | | | | gowin: support for locales other than en_US and C
| * Set the locale as early as possibleYRabbit2022-03-161-9/+0
| | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
| * gowin: test locale workaroundYRabbit2022-03-151-1/+5
| | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
| * gowin: support for locales other than en_US and CYRabbit2022-03-141-0/+6
| | | | | | | | | | | | | | Specifically, those locales where the fractional part separator in floating point numbers is not a dot. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* | gowin: add support for ODDR primitiveYRabbit2022-03-155-11/+177
|/ | | | | | | | | Compatible with older versions of apicula bases. Also small fixes and as the number of virtual Bels grows it is necessary to assign them Z coordinate in a centralized way to avoid conflicts and for this purpose introduced the BelZ enum. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* gowin: Add the Global Set/Reset primitiveYRabbit2022-03-124-0/+51
| | | | | | | | | GSR is added automatically if it was not instantiated by the user explicitly. Compatible with old apicula bases, the functionality does not work, but the crash does not happen --- just a warning. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Merge pull request #931 from yrabbit/bugfix-0gatecat2022-03-041-0/+10
|\ | | | | gowin: BUGFIX gui crash
| * gowin: BUGFIX gui crashYRabbit2022-03-041-0/+10
| | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* | Switch to potentially-sparse net users arraygatecat2022-02-271-5/+6
| | | | | | | | | | | | | | | | This uses a new data structure for net.users that allows gaps, so removing a port from a net is no longer an O(n) operation on the number of users the net has. Signed-off-by: gatecat <gatecat@ds0.me>
* | gowin: recognize partnumbers of GW1NZ-1YRabbit2022-02-241-1/+1
|/ | | | | | | | | | | The model should be recognized by the partnumber, --family is needed only if the same partnumbers belong to different models. This is done in order to automatically generate parameters for calling nextpnr from Gowin files without problems: there also only partnumber is used and only in some cases the model is specified with the -name parameter and GW1NZ-1 is not such a case. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* gowin: Add support for true differential outputYRabbit2022-02-232-0/+87
| | | | | | | | | The new primitive appears as an amalgamation of two existing OBUF primitives. Compatible with older versions of apicula, although, of course, using TLVDS_OBUF with old databases will not bring the desired result, but no crash. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Merge pull request #913 from chiplet/gw1nz-1gatecat2022-02-201-1/+1
|\ | | | | gowin: Add GW1NZ-1 support
| * gowin: Add GW1NZ-1Verneri Hirvonen2022-02-151-1/+1
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* | refactor: New member functions to replace design_utilsgatecat2022-02-183-55/+55
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | refactor: Use constids instead of id("..")gatecat2022-02-164-43/+52
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | refactor: Use cell member functions to add portsgatecat2022-02-161-20/+14
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | refactor: New NetInfo and CellInfo constructorsgatecat2022-02-162-11/+5
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* | clangformatgatecat2022-02-161-7/+7
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* add GW1N-9C dbPepijn de Vos2022-02-061-1/+1
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* gowin: add an option to manually specify familyIcenowy Zheng2022-02-061-6/+11
| | | | | | | | | | | In the vendor IDE, there's a device family named GW1N-9C (which seems to mean C revision of GW1N-9), in which the model numbers are all the same with GW1N-9. Add an option to nextpnr-gowin to allow manually specified family for this situation. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
* Merge pull request #906 from yrabbit/gowin-gui-nocgatecat2022-02-041-4/+4
|\ | | | | gowin: Speed up the GUI
| * gowin: Speed up the GUIYRabbit2022-02-041-4/+4
| | | | | | | | | | | | By mistake, an empty decal gets filled with graphical elements. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* | gowin: Remove leftover debuggingYRabbit2022-02-041-1/+0
| | | | | | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* | Merge branch 'master' into diff-locationsYRabbit2022-02-048-17/+6527
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| * | run clangformatgatecat2022-02-031-1/+0
| |/ | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
| * gowin: Rearrange the GUI constantsYRabbit2022-02-032-4896/+4896
| | | | | | | | | | | | | | All internal constants for describing the graphics have been moved to the .cc file. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
| * gowin: Add GUI.YRabbit2022-01-298-17/+6528
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Items such as LUT, DFF, MUX, ALU, IOB are displayed; * Local wires, 1-2-4-8 wires are displayed; * The clock spines, taps and branches are displayed with some caveats. For now, you can not create a project in the GUI because of possible conflict with another PR (about GW1NR-9C support), but you can specify the board in the command line and load .JSON and .CST in the GUI. Although ALUs are displayed, but the CIN and COUT wires are not. This is still an unsolved problem. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* | gowin: Add a DS location recognitionYRabbit2022-02-031-12/+18
|/ | | | | | | | | For differential signals it is necessary to set the position of two pins at once: P and N. This commit adds that capability and also adds another style of location setting --- with the pin letter in square brackets used in vendor tools. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* gowin: Fix last MUX8YRabbit2022-01-031-1/+1
| | | | | | In fact, there is also an input/output column. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* Merge pull request #877 from pepijndevos/patch-3gatecat2021-12-261-1/+1
|\ | | | | Add support for GW1NS-4 series devices
| * Add support for GW1NS-4 series devicesPepijn de Vos2021-12-241-1/+1
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* | gowin: Initializing the grid dimensionsYRabbit2021-12-261-1/+1
| | | | | | | | | | | | | | gridDimX and gridDimY are not initialized explicitly, which leads to effects when the design is reloaded, say, from the GUI. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* | gowin: Add simplified IO cells processingYRabbit2021-12-204-4/+77
|/ | | | | | | | | | | | | | | Some models have I/O cells that are IOBUFs, and other types (IBUFs and OBUFs) are obtained by feeding 1 or 0 to the OEN input. This is done with general-purpose routing so it's best to do it here to avoid conflicts. For this purpose, in the new bases, these special cells are of type IOBS (IOB Simplified). The proposed changes are compatible with bases of previous versions of Apycula and do not require changing .CST constraint files. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* archapi: Use arbitrary rather than actual placement in predictDelaygatecat2021-12-192-5/+6
| | | | | | | | | | | | This makes predictDelay be based on an arbitrary belpin pair rather than a arc of a net based on cell placement. This way 'what-if' decisions can be evaluated without actually changing placement; potentially useful for parallel placement. A new helper predictArcDelay behaves like the old predictDelay to minimise the impact on existing passes; only arches need be updated. Signed-off-by: gatecat <gatecat@ds0.me>
* Clean gowin modification regexuis2021-12-181-6/+2
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* gowin: Recognize models correctlyYRabbit2021-12-151-1/+1
| | | | | | | | | | | For example, clearly distinguish between GW1N-4 GW1NR-4 GW1NS-4 GW1NSR-4 GW1NSR-4 Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* gowin: Fix spelling of messagesYRabbit2021-12-141-4/+4
| | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* clangformatgatecat2021-12-121-3/+3
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* gowin: BUGFIX. Place the ALU head in sliсe 0 onlyYRabbit2021-12-111-0/+3
| | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* gowin: Check the chipdb versionYRabbit2021-11-072-1/+7
| | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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