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* Remove isValidBelForCellgatecat2021-02-161-5/+0
* Add getBelHidden and add some missing "override" statements.Keith Rothman2021-02-111-1/+1
* Add BaseArchRanges for default ArchRanges typesgatecat2021-02-091-16/+1
* Use 'T' postfix to disambiguate LHS and RHS of usingD. Shah2021-02-081-21/+21
* Add archArgs and archArgsToId to Arch APID. Shah2021-02-051-2/+3
* ice40: Switch to BaseArchD. Shah2021-02-051-140/+111
* Mark IdString and IdStringList single argument constructors explicit.Keith Rothman2021-02-041-1/+1
* ice40: Use snake case for arch-specific functionsD. Shah2021-02-031-11/+11
* ice40: Implement IdStringList for all arch object namesD. Shah2021-02-021-14/+25
* arch: Add getNameDelimiter API for string listsD. Shah2021-02-021-0/+1
* Run "make clangformat".Keith Rothman2021-02-021-18/+14
* Rename Partition -> BelBucket.Keith Rothman2021-02-021-19/+19
* Add Partition APIs to ice40, nexus, gowin archs.Keith Rothman2021-02-021-0/+43
* Initial refactoring of placer API.Keith Rothman2021-02-021-0/+5
* cleanup: Spelling fixesD. Shah2021-01-281-1/+1
* Move RelPtr/RelSlice out of arches into commonD. Shah2021-01-271-42/+1
* ice40: Switch from RelPtr to RelSliceD. Shah2021-01-271-40/+51
* RelPtr: remove copy constructor and copy assignmentDavid Shah2020-11-131-0/+3
* Remove wire alias APIDavid Shah2020-10-151-9/+0
* Support rest of partsMiodrag Milanovic2020-07-081-0/+3
* Adding LP4K as wellMiodrag Milanovic2020-07-081-0/+1
* Support 4K parts directlyMiodrag Milanovic2020-07-081-0/+1
* Simplify and improve chipdb embedding/loading.whitequark2020-06-261-14/+3
* CMake: rewrite chipdb handling from ground up.whitequark2020-06-251-1/+1
* ice40: Implement getRouteBoundingBox for router2David Shah2020-02-031-0/+2
* Allow selection of router algorithmDavid Shah2020-02-031-0/+2
* Add --placer option and refactor placer selectionDavid Shah2019-03-241-0/+3
* ice40: support u4kSimon Schubert2019-02-231-1/+4
* Load chipdb from filesystem as optionMiodrag Milanovic2019-02-091-1/+1
* timing: Path related fixesDavid Shah2019-01-271-1/+4
* ice40: Add helper to know which global network is driven by a SB_GB BelSylvain Munaut2018-11-261-0/+7
* ice40: Add GlobalNetowkrInfo in the chip databaseSylvain Munaut2018-11-191-1/+17
* ice40/arch: Add helper to check if a BEL is LOCKED or notSylvain Munaut2018-11-191-0/+2
* Merge remote-tracking branch 'origin/master' into timingapiEddie Hung2018-11-131-0/+1
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| * [ice40] getBudgetOverride() to use constrained Z not placed ZEddie Hung2018-11-131-0/+1
* | Merge remote-tracking branch 'origin/master' into timingapiEddie Hung2018-11-131-17/+37
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| * Merge pull request #107 from YosysHQ/router_improveEddie Hung2018-11-131-17/+37
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| | * clangformatClifford Wolf2018-11-111-4/+1
| | * Add getConflictingWireWire() arch API, streamline getConflictingXY semanticClifford Wolf2018-11-111-14/+29
| | * Add getConflictingPipWire() arch API, router1 improvementsClifford Wolf2018-11-111-9/+17
* | | archapi: Add getDelayFromNS to improve timing algorithm portabilityDavid Shah2018-11-121-0/+6
* | | timing: iCE40 Arch API changes for clocking infoDavid Shah2018-11-121-2/+4
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* / fix grid dimensions for ice40Miodrag Milanovic2018-10-271-2/+2
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* clangformatDavid Shah2018-09-301-1/+1
* Add iCE40 gfx for span-4 wires between IO tilesClifford Wolf2018-08-191-2/+0
* Merge pull request #47 from YosysHQ/settings_propagateClifford Wolf2018-08-181-2/+0
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| * Use settings for placer1 and router1Miodrag Milanovic2018-08-091-2/+0
* | Improve iCE40 gfx for IO tiles and RAM tilesClifford Wolf2018-08-181-0/+2
* | Add ice40 wire attributes (grid position, segment list)Clifford Wolf2018-08-181-18/+5
* | Add Arch attrs APIClifford Wolf2018-08-141-0/+18
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