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* ice40: Add support for PLL ICEGATE functionSylvain Munaut2023-02-011-0/+3
* ice40: Support for undriven / unconnected output portsSylvain Munaut2023-01-291-1/+6
* ice40: Rework pull-up attribute copy to SB_IO blocksSylvain Munaut2023-01-291-8/+14
* refactor: Use IdString::in instead of || chainsgatecat2022-08-101-4/+4
* Switch to potentially-sparse net users arraygatecat2022-02-271-1/+1
* refactor: New member functions to replace design_utilsgatecat2022-02-181-22/+25
* refactor: Use constids instead of id("..")gatecat2022-02-161-295/+293
* refactor: Use cell member functions to add portsgatecat2022-02-161-169/+162
* refactor: New NetInfo and CellInfo constructorsgatecat2022-02-161-12/+8
* Fixing old emails and names in copyrightsgatecat2021-06-121-3/+3
* Using hashlib in archesgatecat2021-06-021-1/+1
* Improve handling of unused inout port bitsDavid Shah2020-02-251-1/+18
* Preserve hierarchy through packingDavid Shah2019-12-271-0/+4
* sdf: Working on support for CVCDavid Shah2019-10-241-1/+1
* ice40: Preserve top level IO properlyDavid Shah2019-10-191-1/+19
* Major Property improvements for common and iCE40David Shah2019-08-051-80/+80
* ice40: add RGB_DRV/LED_DRV_CUR support for u4kSimon Schubert2019-06-101-0/+16
* ice40: Add support for SB_I2C and SB_SPISylvain Munaut2019-03-251-0/+47
* clangformatDavid Shah2018-12-061-1/+2
* ice40: Add support for placing SB_LEDDA_IP block.Daniel Serpell2018-12-011-0/+14
* ice40: Add support for SB_RGBA_DRVSylvain Munaut2018-11-191-0/+14
* ice40/chipdb: Add wires to global network for all cells that can drive itSylvain Munaut2018-11-191-2/+2
* ice40: Fix PLLTYPE for SB_PLL40_2F_PADSylvain Munaut2018-11-191-1/+1
* ice40: Make PLL default FEEDBACK_MODE to SIMPLESylvain Munaut2018-11-191-1/+1
* ice40: Fix SPRAM and IO globalsDavid Shah2018-11-041-0/+4
* ice40: Fix PLL DYNAMICDELAYDavid Shah2018-10-271-1/+2
* Merge pull request #79 from YosysHQ/ice40lvdsClifford Wolf2018-09-251-4/+8
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| * ice40: Tristate IO support fixesDavid Shah2018-09-241-4/+8
* | Add needed PLLOUTGLOBAL ports and mapped it properlyMiodrag Milanovic2018-09-121-0/+2
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* ice40: make PLL packing more robustSergiusz Bazanski2018-08-191-1/+2
* ice40: Add HFOSC support, force fabric routing on oscillators for nowDavid Shah2018-08-011-2/+2
* ice40: fixes before reviewSergiusz Bazanski2018-07-241-0/+1
* ice40: Implement emitting PLLsSergiusz Bazanski2018-07-241-0/+49
* ice40: Packer and bitstream gen support for MAC16sDavid Shah2018-07-191-2/+3
* ice40: Adding cell definition for DSPsDavid Shah2018-07-191-0/+72
* ice40: Fixes for inverted clocksDavid Shah2018-07-181-1/+2
* refactor: Replace assert with NPNR_ASSERTDavid Shah2018-07-041-4/+4
* ice40: UltraPlus SPRAM workingDavid Shah2018-06-291-0/+18
* Working on debugging carry packerDavid Shah2018-06-261-1/+1
* clang fixMiodrag Milanovic2018-06-261-1/+1
* nets and cells are unique_ptr'sMiodrag Milanovic2018-06-251-46/+46
* ice40: More preparations for carry legalisationDavid Shah2018-06-251-0/+2
* Refactor: remove PlacementValidityChecker and move methods to ArchDavid Shah2018-06-251-3/+3
* Update from increased clangformat line lengthDavid Shah2018-06-231-16/+9
* ice40: Move global net test to ArchDavid Shah2018-06-231-8/+2
* Cleanup almost all deprecation warningsMiodrag Milanovic2018-06-231-21/+21
* ice40: SB_LFOSC support, fabric routing onlyDavid Shah2018-06-221-2/+17
* Switched from clifford@clifford.at to clifford@symbioticeda.com for copyright...Clifford Wolf2018-06-221-1/+1
* Improved log messages in SA placer, minor changes from clangformatClifford Wolf2018-06-191-3/+4
* ice40: Improve error reporting for invalid tristate usageDavid Shah2018-06-191-4/+9
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