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* Add iCE40 gfx for wires connecting fabric tiles and IO tilesClifford Wolf2018-08-181-2/+2
* Get rid of PortPin and BelType (ice40, generic, docs)Clifford Wolf2018-08-081-4/+4
* Fix filenames for MSVC buildMiodrag Milanovic2018-08-011-4/+4
* cmake: Set --fast and --slow chipdb.py argumentsDavid Shah2018-07-301-2/+23
* proper options for linux buildMiodrag Milanovic2018-07-251-1/+1
* Use bbasm to create iCE40 chipdbClifford Wolf2018-07-241-4/+4
* Add bbasm target, use as passthru in iCE40 builderDavid Shah2018-07-241-5/+16
* Improve iCE40 wire database and gfxClifford Wolf2018-07-121-2/+4
* Python executable filename could be differentMiodrag Milanovic2018-07-081-2/+2
* Building using MSVC worksMiodrag Milanovic2018-07-041-16/+36
* Add opetion to defie ICEBOX_ROOT, fix compile on other locationMiodrag Milanovic2018-07-031-2/+4
* added parameter to callMiodrag Milanovic2018-07-031-1/+1
* Add nextpnr namespaceClifford Wolf2018-06-121-0/+1
* ice40: Optimising chipdb buildsDavid Shah2018-06-121-0/+1
* cmake: Add HX1K-only builds supportDavid Shah2018-06-071-1/+9
* Fix race condition and optimise the buildDavid Shah2018-06-021-2/+6
* Add a CMake based build systemDavid Shah2018-06-021-0/+14