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ice40
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Author
Age
Files
Lines
...
|
*
General reformatting
David Shah
2018-06-17
3
-3
/
+3
|
*
ice40: Add symbol output to bitstream generation
David Shah
2018-06-17
1
-6
/
+8
|
*
Updating copyrights
David Shah
2018-06-17
11
-4
/
+12
|
*
Improving the placer output
David Shah
2018-06-17
2
-1
/
+4
|
*
Add 'get or default' functions
David Shah
2018-06-17
1
-3
/
+4
|
*
ice40: Fixing build
David Shah
2018-06-17
2
-2
/
+2
|
*
place: Fix placer validity checks
David Shah
2018-06-16
2
-0
/
+24
|
*
ice40: Proper global promotion
David Shah
2018-06-16
4
-24
/
+83
|
*
ice40: Promote reset signal
David Shah
2018-06-16
4
-32
/
+82
*
|
Move WireInfoPOD into ChipDB binary blob
Clifford Wolf
2018-06-17
3
-39
/
+61
*
|
Minor refactoring of BinaryBlobAssembler, fix alignments
Clifford Wolf
2018-06-17
4
-84
/
+145
*
|
Progress with chipdb refactoring
Clifford Wolf
2018-06-16
4
-23
/
+39
*
|
Progress with chipdb refactoring
Clifford Wolf
2018-06-16
3
-42
/
+37
*
|
Progress with chipdb refactoring
Clifford Wolf
2018-06-16
3
-33
/
+175
|
/
*
Update clangformat
Clifford Wolf
2018-06-16
1
-1
/
+1
*
Merge remote-tracking branch 'origin/master' into chipdbng
Clifford Wolf
2018-06-16
8
-21
/
+122
|
\
|
*
ice40: Fix RAM config in packer
David Shah
2018-06-16
1
-1
/
+2
|
*
ice40: Fix BRAM initialisation
David Shah
2018-06-16
2
-4
/
+4
|
*
place: Tidying up the SA placer
David Shah
2018-06-16
1
-1
/
+1
|
*
ice40: Include RAM init data in bitstream
David Shah
2018-06-16
1
-0
/
+40
|
*
ice40: Fix bitstream generation when parameters are unspecified
David Shah
2018-06-16
1
-13
/
+23
|
*
ice40: Bitstream generation for RAM
David Shah
2018-06-16
1
-1
/
+36
|
*
ice40: Only place IO at valid pins
David Shah
2018-06-16
3
-3
/
+14
|
*
experiment: Simple heuristic-based placer
David Shah
2018-06-16
4
-6
/
+10
*
|
Some refactoring of Chip API (prep for chipdb refactoring)
Clifford Wolf
2018-06-16
3
-25
/
+47
|
/
*
ice40: Another arch_place fix
David Shah
2018-06-14
1
-1
/
+1
*
ice40: General fixes
David Shah
2018-06-14
2
-11
/
+21
*
ice40: Read cells in arachne placement script
David Shah
2018-06-14
1
-1
/
+1
*
ice40: Importer for placed ice40 designs from arachne
David Shah
2018-06-14
3
-0
/
+35
*
Add route-ripup routing loop
Clifford Wolf
2018-06-14
2
-7
/
+13
*
Refactor position/delay estimation API
Clifford Wolf
2018-06-14
3
-34
/
+17
*
Drastically reduce number of linker symbols in chipdb
Clifford Wolf
2018-06-13
1
-18
/
+40
*
ice40: Rename ICESTORM_RAM pins
David Shah
2018-06-13
2
-3
/
+56
*
Add picorv32_top module with fewer IO pins
Clifford Wolf
2018-06-13
2
-1
/
+32
*
Add missing iCE40 global buffer bels
Clifford Wolf
2018-06-13
1
-0
/
+18
*
Add test PicoRV32 build script
Clifford Wolf
2018-06-13
2
-0
/
+7
*
Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr
Clifford Wolf
2018-06-13
2
-3
/
+38
|
\
|
*
ice40: Pack RAMs
David Shah
2018-06-13
3
-8
/
+46
*
|
Add A*-like optimizations to router
Clifford Wolf
2018-06-13
5
-9
/
+28
|
/
*
ice40: Promote one clock to a global buffer
David Shah
2018-06-13
3
-1
/
+61
*
Add hierarchy to bel/wire/pip names
Clifford Wolf
2018-06-13
3
-17
/
+28
*
Fixing implementation of constants
David Shah
2018-06-13
3
-8
/
+52
*
ice40: Update examples to use packer/pcf
David Shah
2018-06-13
10
-398
/
+37
*
Update chip Graphics API
Clifford Wolf
2018-06-13
2
-18
/
+24
*
Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr
Clifford Wolf
2018-06-13
11
-242
/
+306
|
\
|
*
ice40: Add a PCF parser
David Shah
2018-06-13
7
-171
/
+131
|
*
ice40: Add package selection
David Shah
2018-06-13
3
-3
/
+25
|
*
ice40: Add package pins to database
David Shah
2018-06-13
2
-3
/
+52
|
*
Simple IO buffer insertion, enable packer by default
David Shah
2018-06-13
4
-33
/
+65
|
*
Remove IO buffers when fed by SB_IO
David Shah
2018-06-13
3
-1
/
+63
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