Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | | Merge branch 'precompiled-bba' of https://github.com/xobs/nextpnr into ↵ | David Shah | 2019-09-19 | 1 | -10/+32 | |
|\ \ | | | | | | | | | | xobs-precompiled-bba | |||||
| * | | ice40: support PREGENERATED_BBA_PATH | Sean Cross | 2019-09-17 | 1 | -18/+31 | |
| |/ | | | | | | | | | | | | | Add support for pregenerating BBA files, to build on Windows and Darwin. Signed-off-by: Sean Cross <sean@xobs.io> | |||||
* | | Merge pull request #330 from zeldin/bba | David Shah | 2019-09-19 | 1 | -5/+6 | |
|\ \ | |/ |/| | bba: Default to native endian in bbasm | |||||
| * | CMake: Generate chipdbs in build tree when building out-of-tree | Marcus Comstedt | 2019-09-15 | 1 | -3/+4 | |
| | | | | | | | | Signed-off-by: Marcus Comstedt <marcus@mc.pp.se> | |||||
| * | bba: Require explicit endianness flag, and supply it | Marcus Comstedt | 2019-09-15 | 1 | -2/+2 | |
| | | | | | | | | Signed-off-by: Marcus Comstedt <marcus@mc.pp.se> | |||||
* | | python: Fix getWireBelPins | David Shah | 2019-09-15 | 2 | -0/+20 | |
|/ | | | | | | Fixes #327 Signed-off-by: David Shah <dave@ds0.me> | |||||
* | Merge pull request #329 from YosysHQ/dave/net_aliases | David Shah | 2019-09-13 | 1 | -0/+5 | |
|\ | | | | | json: Add support for net aliases | |||||
| * | json: Add support for net aliases | David Shah | 2019-09-13 | 1 | -0/+5 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | | ice40: Move clock constraints across SB_IO and SB_GB_IO | David Shah | 2019-09-13 | 1 | -0/+20 | |
|/ | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ice40: Fix DSP cascade wires | David Shah | 2019-09-03 | 1 | -4/+9 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ice40: Only warn about default package if there is no package argument | Sylvain Munaut | 2019-08-10 | 1 | -3/+4 | |
| | | | | Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | |||||
* | Add deprecation warning for default packages | David Shah | 2019-08-08 | 3 | -3/+5 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ice40/examples: Fix blinky.sh | David Shah | 2019-08-08 | 1 | -1/+1 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ice40: Add better stats on LC packing | David Shah | 2019-08-08 | 2 | -1/+15 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ice40: Fix regression | David Shah | 2019-08-05 | 1 | -1/+3 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | Major Property improvements for common and iCE40 | David Shah | 2019-08-05 | 8 | -161/+169 | |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | Merge pull request #284 from YosysHQ/json_write | David Shah | 2019-07-03 | 5 | -98/+90 | |
|\ | | | | | Initial support for writing to json files from nextpnr. | |||||
| * | clangformat run | Miodrag Milanovic | 2019-06-25 | 3 | -27/+26 | |
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| * | Merge master | Miodrag Milanovic | 2019-06-25 | 8 | -4/+83 | |
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| * | | enable lading of jsons and setting up context | Miodrag Milanovic | 2019-06-14 | 1 | -0/+2 | |
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| * | | Use flags for each step | Miodrag Milanovic | 2019-06-14 | 2 | -3/+3 | |
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| * | | restore arch info for ecp5 | Miodrag Milanovic | 2019-06-14 | 1 | -0/+3 | |
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| * | | restore context from json | Miodrag Milanovic | 2019-06-14 | 1 | -3/+43 | |
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| * | | Load properties from json and propagate to context create | Miodrag Milanovic | 2019-06-13 | 1 | -2/+2 | |
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| * | | Save settings that we saved in project | Miodrag Milanovic | 2019-06-13 | 1 | -1/+1 | |
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| * | | Remove concept of project and code connected | Miodrag Milanovic | 2019-06-13 | 1 | -76/+0 | |
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| * | | Use properties for settings and save in json | Miodrag Milanovic | 2019-06-12 | 1 | -1/+1 | |
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| * | | Save top level attrs and store current step | Miodrag Milanovic | 2019-06-07 | 2 | -0/+3 | |
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| * | | Add vcc and gnd nets and cells only if needed | Miodrag Milanovic | 2019-06-07 | 1 | -5/+20 | |
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| * | | Cleanup | Miodrag Milanovic | 2019-06-07 | 2 | -13/+0 | |
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| * | | WIP saving/loading attributes | Miodrag Milanovic | 2019-06-07 | 3 | -4/+23 | |
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| * | | Revert "Do not add VCC if not used, loading json works" | Miodrag Milanovic | 2019-06-02 | 1 | -6/+5 | |
| | | | | | | | | | | | | This reverts commit f1b3a14bc23ccee6acaf6bbe27827523dc13c111. | |||||
| * | | Added support for attributes/properties types | Miodrag Milanovic | 2019-06-01 | 1 | -1/+1 | |
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| * | | Do not add VCC if not used, loading json works | Miodrag Milanovic | 2019-05-31 | 1 | -5/+6 | |
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* | | | Merge pull request #297 from whitequark/serialize-chipdb | David Shah | 2019-06-27 | 1 | -21/+29 | |
|\ \ \ | | | | | | | | | Serialize chipdb generation by default | |||||
| * | | | CMake: serialize chipdb generation by default. | whitequark | 2019-06-26 | 1 | -2/+10 | |
| | | | | | | | | | | | | | | | | Fixes #296. | |||||
| * | | | CMake: formatting. NFC. | whitequark | 2019-06-26 | 1 | -21/+21 | |
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* | | | Merge pull request #283 from tux3/warn_pcf_trailing | David Shah | 2019-06-26 | 1 | -1/+4 | |
|\ \ \ | |/ / |/| | | ice40: Warn that trailing PCF settings are ignored | |||||
| * | | ice40: Warn that trailing PCF settings are ignored | tux3 | 2019-05-31 | 1 | -1/+4 | |
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* | | clangformat | David Shah | 2019-06-24 | 3 | -6/+12 | |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
* | | ice40: add RGB_DRV/LED_DRV_CUR support for u4k | Simon Schubert | 2019-06-10 | 8 | -4/+77 | |
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* | ice40: Add support for HFOSC trimming | Sylvain Munaut | 2019-05-13 | 1 | -0/+5 | |
| | | | | Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | |||||
* | Merge pull request #270 from smunaut/sb_io_conflict | David Shah | 2019-04-17 | 2 | -2/+38 | |
|\ | | | | | SB IO conflict checks | |||||
| * | ice40: Check for SB_IO shared wires conflicts in isValidBelForCell | Sylvain Munaut | 2019-04-17 | 1 | -0/+36 | |
| | | | | | | | | Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | |||||
| * | ice40: In assignCellInfo get PIN_TYPE/NEG_TRIGGER from params and not attrs | Sylvain Munaut | 2019-04-17 | 1 | -2/+2 | |
| | | | | | | | | Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | |||||
* | | ice40: Only create padin gbuf for PLLs if global output actually used | Sylvain Munaut | 2019-04-17 | 1 | -11/+38 | |
| | | | | | | | | Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | |||||
* | | ice40: Take placed SB_GBs into account when placing PLLs | Sylvain Munaut | 2019-04-16 | 1 | -9/+55 | |
|/ | | | | | | | | | | | | | | | | Because the PLLs drive global networks, we need to account for already existing and placed SB_GBs when trying to place/pack them. Theses can be user instanciated SB_GBs with BEL attribute, or SB_GB_IOs that got converted during the IO packing. This patch assumes that: - If a PLL is used the output A global network is always used, even if there is no connection to the global output pin - If a PLL with a singe output is used, then the B output global network is still free to be used by whatever. Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | |||||
* | ice40/pack: During IO packing, remove any unused input connection | Sylvain Munaut | 2019-04-11 | 1 | -0/+13 | |
| | | | | | | | | | This is mostly for the benefit of PLL placement because the D_IN_x ports are used for other purposes when PLL is enabled so we need to make sure nothing is connected there already. (even an unused net is too much) Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | |||||
* | ice40: Don't constrain to a PLL bel that has already been used | David Shah | 2019-04-01 | 1 | -0/+2 | |
| | | | | | | Fixes #258 Signed-off-by: David Shah <dave@ds0.me> | |||||
* | ice40: Add support for SB_I2C and SB_SPI | Sylvain Munaut | 2019-03-25 | 5 | -1/+112 | |
| | | | | Signed-off-by: Sylvain Munaut <tnt@246tNt.com> |