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* | | | | | add only missing netMiodrag Milanovic2018-07-211-3/+6
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* | | | | Change DelayInfo semantics to what we actually needClifford Wolf2018-07-211-3/+8
* | | | | Add getWireDelay APIClifford Wolf2018-07-211-0/+6
* | | | | Fix warnings and statusMiodrag Milanovic2018-07-212-2/+19
* | | | | Made save project work as wellMiodrag Milanovic2018-07-211-3/+0
* | | | | fix introduced bugMiodrag Milanovic2018-07-211-0/+2
* | | | | Bind wires to netMiodrag Milanovic2018-07-201-629/+637
* | | | | Add Location APIs to generic archClifford Wolf2018-07-202-8/+20
* | | | | Improve iCE40 and common Loc codeClifford Wolf2018-07-203-15/+33
* | | | | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into gridapiClifford Wolf2018-07-2018-132/+517
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| * | | | | Few more checks on parameters and error eolMiodrag Milanovic2018-07-202-7/+17
| * | | | | Start adding bitstream reading for ice40Miodrag Milanovic2018-07-203-33/+142
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| * | | | ice40: Optimise reset/enable net checkingDavid Shah2018-07-203-11/+14
| * | | | ice40: Trim DSP inputs that are constant where appropriateDavid Shah2018-07-191-0/+4
| * | | | ice40: Packer and bitstream gen support for MAC16sDavid Shah2018-07-193-3/+111
| * | | | ice40: Adding cell definition for DSPsDavid Shah2018-07-194-5/+79
| * | | | ice40: Add virtual padin wires for intoscs and GB_IOsDavid Shah2018-07-191-1/+14
| * | | | Reducing performance cost of assertsDavid Shah2018-07-191-1/+1
| * | | | ice40: Adding data for extra cell configurationDavid Shah2018-07-192-4/+39
| * | | | ice40: RenamingDavid Shah2018-07-184-9/+9
| * | | | ice40: Fixes for inverted clocksDavid Shah2018-07-183-2/+7
| * | | | Cleanups in iCE40 blinky and picorv32 testsClifford Wolf2018-07-184-35/+2
| * | | | ice40: Use xArchArgs in validity checkDavid Shah2018-07-184-39/+39
| * | | | ice40: Make assignArchArgs a Arch method; call also after legaliserDavid Shah2018-07-184-31/+37
| * | | | ice40: Assign ArchArgs after packingDavid Shah2018-07-187-14/+63
| * | | | Add ArchNetInfo and ArchCellInfoClifford Wolf2018-07-171-1/+3
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* / | | Add Loc struct for x/y/z bel locationsClifford Wolf2018-07-171-2/+29
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* | / refactor: Remove incorrect uses of the term 'wirelength'David Shah2018-07-161-4/+4
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* | Remove pip names from ice40 chip db to safe memoryClifford Wolf2018-07-153-5/+19
* | Add iCE40 Pip gfxClifford Wolf2018-07-155-22/+255
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* Fix revert issues.Sergiusz Bazanski2018-07-141-12/+0
* Revert "Make ice40::Arch thread-safe"Sergiusz Bazanski2018-07-143-44/+11
* Revert "Make PnR use Unlocked methods"Sergiusz Bazanski2018-07-144-129/+34
* Revert "Introduce proxies for locked access to ctx"Sergiusz Bazanski2018-07-144-531/+387
* Revert "Comment arch.h"Sergiusz Bazanski2018-07-141-34/+1
* Revert "Slight simplification of proxy code"Sergiusz Bazanski2018-07-142-93/+68
* Revert "Make GUI nice and smooth."Sergiusz Bazanski2018-07-143-15/+6
* Revert "Refactor proxies to nextpnr."Sergiusz Bazanski2018-07-144-63/+156
* Revert "clang-format"Sergiusz Bazanski2018-07-142-50/+109
* Revert "Add read/mutate context stubs for ECP5"Sergiusz Bazanski2018-07-141-0/+4
* Revert "Move read methods to ReadMethods, remove some legacy access to Arch"Sergiusz Bazanski2018-07-142-5/+4
* Revert "Remove legacy access to state via Arch"Sergiusz Bazanski2018-07-146-65/+120
* Revert "Remove unimplemented pybindings (for now)"Sergiusz Bazanski2018-07-141-0/+32
* Revert "Undo accidental picorv32.sh commit"Sergiusz Bazanski2018-07-141-4/+4
* Undo accidental picorv32.sh commitSergiusz Bazanski2018-07-141-4/+4
* Remove unimplemented pybindings (for now)Sergiusz Bazanski2018-07-141-32/+0
* Remove legacy access to state via ArchSergiusz Bazanski2018-07-146-120/+65
* Move read methods to ReadMethods, remove some legacy access to ArchSergiusz Bazanski2018-07-142-4/+5
* Add read/mutate context stubs for ECP5Sergiusz Bazanski2018-07-141-4/+0
* clang-formatSergiusz Bazanski2018-07-142-109/+50