Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | HeAP: Add PlacerHeapCfg | David Shah | 2019-03-22 | 1 | -1/+3 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | HeAP: Make HeAP placer optional | David Shah | 2019-03-22 | 2 | -5/+11 |
| | | | | | | | | | | | | | A CMake option 'BUILD_HEAP' (default on) configures building of the HeAP placer and the associated Eigen3 dependency. Default for the iCE40 is SA placer, with --heap-placer to use HeAP Default for the ECP5 is HeAP placer, as SA placer can take 1hr+ for large ECP5 designs and HeAP tends to give better QoR. --sa-placer can be used to use SA instead, and auto-fallback to SA if HeAP not built. Signed-off-by: David Shah <dave@ds0.me> | ||||
* | HeAP: Add TAUCS wrapper and integration | David Shah | 2019-03-22 | 1 | -2/+4 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | ice40: Add examples folder including floorplan example | David Shah | 2019-03-22 | 11 | -0/+42 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Add Python helper functions for floorplanning | David Shah | 2019-03-22 | 1 | -0/+7 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | ice40: Fix u4k in external chipdb mode. | Marcin Kościelnicki | 2019-03-19 | 1 | -3/+3 |
| | | | | Signed-off-by: Marcin Kościelnicki <marcin@symbioticeda.com> | ||||
* | ice40: u4k merge fix | David Shah | 2019-02-25 | 1 | -0/+2 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Merge pull request #239 from YosysHQ/dsp_casc_dummy_wires | David Shah | 2019-02-25 | 2 | -0/+24 |
|\ | | | | | ice40: Add DSP SIGNEXTIN/OUT and ACCUMCI/O ports | ||||
| * | ice40: Add DSP SIGNEXTIN/OUT and ACCUMCI/O ports | David Shah | 2019-02-21 | 2 | -0/+24 |
| | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | | ice40: support u4k | Simon Schubert | 2019-02-23 | 13 | -13/+57 |
|/ | |||||
* | ice40: Fix timing class of 'padin' GB outputs | David Shah | 2019-02-20 | 1 | -1/+1 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | Merge branch 'master' into mmaped_chipdb | Miodrag Milanović | 2019-02-12 | 1 | -1/+8 |
|\ | |||||
| * | ice40: PLLs can't conflict with themselves | David Shah | 2019-02-09 | 1 | -0/+2 |
| | | | | | | | | | | | | Fixes error building testcase from #145 Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | ice40: Don't create PLLOUT_B buffer for single-output PLL variants | David Shah | 2019-02-09 | 1 | -1/+6 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | | Fix according to comments on PR | Miodrag Milanovic | 2019-02-10 | 1 | -1/+1 |
| | | |||||
* | | Load chipdb from filesystem as option | Miodrag Milanovic | 2019-02-09 | 3 | -83/+114 |
|/ | |||||
* | Merge pull request #220 from YosysHQ/coi3 | Eddie Hung | 2019-01-29 | 1 | -6/+9 |
|\ | | | | | ice40: Add budget override for CO->I3 path | ||||
| * | [ice40] Refactor Arch::getBudgetOverride() | Eddie Hung | 2019-01-29 | 1 | -29/+9 |
| | | |||||
| * | ice40: Add budget override for CO->I3 path | David Shah | 2019-01-27 | 1 | -0/+23 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | | timing: Path related fixes | David Shah | 2019-01-27 | 2 | -6/+33 |
|/ | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Merge pull request #211 from smunaut/ice40_ram_attrs | David Shah | 2019-01-21 | 1 | -0/+4 |
|\ | | | | | ice40/pack: Copy attributes to packed cell | ||||
| * | ice40/pack: Copy attributes to packed RAM cells | Sylvain Munaut | 2019-01-19 | 1 | -0/+4 |
| | | | | | | | | | | | | | | Useful to allow manual placement of SPRAM/EBR using BEL attribute for instance Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | ||||
* | | ice40: Add error message if a selected site is not Global Buffer capable | Sylvain Munaut | 2019-01-18 | 1 | -0/+4 |
|/ | | | | | | ... rather than assert()-out during the call to getWireBelPins() call Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | ||||
* | ice40: Add timing data for all IO modes | David Shah | 2019-01-07 | 2 | -3/+67 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | ice40: Improve handling of unconstrained IO | David Shah | 2018-12-26 | 3 | -3/+23 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | ice40: Add PCF support for -pullup, -pullup_resistor and -nowarn | David Shah | 2018-12-20 | 2 | -4/+45 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | ice40: Fix LOCK feedthrough insertion with carry or >8 LUTs | David Shah | 2018-12-20 | 1 | -4/+10 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | ci: Add attosoc smoketest for ice40 | David Shah | 2018-12-08 | 8 | -0/+3185 |
| | | | | Signed-off-by: David Shah <davey1576@gmail.com> | ||||
* | Merge pull request #163 from daveshah1/timing_opt | David Shah | 2018-12-07 | 3 | -2/+17 |
|\ | | | | | Adding criticality calculation and experimental timing optimisation pass | ||||
| * | timing_opt: Reduce iterations to 30, tidy up logging | David Shah | 2018-12-06 | 1 | -2/+1 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | timing_opt: Improve heuristics | David Shah | 2018-12-06 | 1 | -1/+1 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | timing_opt: Make an optional pass controlled by command line | David Shah | 2018-12-06 | 2 | -3/+11 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | clangformat | David Shah | 2018-12-06 | 1 | -3/+4 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | timing_opt: Debugging and integration | David Shah | 2018-12-06 | 1 | -1/+8 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | | ice40: Report error for unsupported PLL FEEDBACK_PATH values | David Shah | 2018-12-06 | 1 | -7/+11 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | | ice40: Improve bitstream error handling | David Shah | 2018-12-06 | 1 | -2/+10 |
|/ | | | | | | Fixes #161 and provides a clearer error for #170 Signed-off-by: David Shah <dave@ds0.me> | ||||
* | clangformat | David Shah | 2018-12-06 | 2 | -2/+3 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | ice40: Put debug logging behind ctx->debug | David Shah | 2018-12-06 | 1 | -3/+5 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | ice40: Fix carry chain splitting | David Shah | 2018-12-05 | 1 | -1/+1 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | ice40: Don't split carry chain in simple feed-out cases | David Shah | 2018-12-04 | 1 | -7/+50 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | ice40: Include I3 connectivity in chain | David Shah | 2018-12-04 | 1 | -23/+25 |
| | | | | | | Thanks @smunaut Signed-off-by: David Shah <dave@ds0.me> | ||||
* | ice40: add reset global promotion threshold. | whitequark | 2018-12-04 | 1 | -1/+3 |
| | |||||
* | ice40: Add support for placing SB_LEDDA_IP block. | Daniel Serpell | 2018-12-01 | 5 | -1/+26 |
| | | | | Signed-off-by: Daniel Serpell <daniel.serpell@gmail.com> | ||||
* | ice40: Add a warning for unconstrained IO | David Shah | 2018-11-29 | 1 | -6/+5 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Improve reporting of unknown cell types | David Shah | 2018-11-29 | 1 | -1/+1 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Merge pull request #157 from whitequark/fanout-thresh | David Shah | 2018-11-29 | 1 | -1/+1 |
|\ | | | | | ice40: raise CE global promotion threshold | ||||
| * | ice40: raise CE global promotion threshold. | whitequark | 2018-11-29 | 1 | -1/+1 |
| | | |||||
* | | ice40: print fanout of nets promoted to globals. | whitequark | 2018-11-28 | 1 | -7/+11 |
|/ | |||||
* | Merge pull request #155 from smunaut/issue_151 | David Shah | 2018-11-28 | 1 | -48/+48 |
|\ | | | | | ice40: Update the way LVDS inputs are handled during bitstream generation | ||||
| * | ice40: Update the way LVDS inputs are handled during bitstream generation | Sylvain Munaut | 2018-11-28 | 1 | -48/+48 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Instead of "patching" input_en, we completely separate config for normal and LVDS pair. - For normal pair, nothing changes - For LVDS pairs, the IE/REN bits are always set as if the input buffer are disabled. Then if input_en was set to 1 (i.e. the input is actually for something), then we set the IoCtrl.LVDS bit. - Also for LVDS, if input is used, pullups are forcibly disabled. * When scanning for unused IOs, never process those part of a LVDS pair. They will have been configured by the complement Signed-off-by: Sylvain Munaut <tnt@246tNt.com> |