| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | machxo2: Add prefix parameter to mitertest.sh. All Verilog files top modules ↵ | William D. Jones | 2021-02-12 | 1 | -1/+1 |
| | | | | | named "top". | ||||
| * | machxo2: Add demo.sh TinyFPGA Ax example. | William D. Jones | 2021-02-12 | 1 | -0/+28 |
 |
index : iCE40/nextpnr | |
| [no description] |
| aboutsummaryrefslogtreecommitdiffstats |