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* refactor: Use constids instead of id("..")gatecat2022-02-161-20/+20
* nexus: reduce OSCA worst case to 7%Dan Callaghan2022-02-101-1/+1
* Fixed correction of Nexus OSCA frequency constraintsMaciej Kurc2022-02-021-2/+2
* Added honoring OSCA output frequency tolerance during constraints generationMaciej Kurc2022-01-281-2/+3
* Removed the need for MULT36_CORE bel for implementing the MULTADDSUB9X9WIDE m...Maciej Kurc2022-01-251-1/+1
* clangformatgatecat2021-12-121-15/+11
* Added checking if all FFs added to an existing cluster have matching configur...Maciej Kurc2021-11-231-0/+44
* Fixed potential issues with carry-chain cluster expansion, added a parameter ...Maciej Kurc2021-11-221-14/+15
* Added appending FFs to other existing LUT cluster types (carry, widefn)Maciej Kurc2021-11-221-18/+67
* Added an option to control LUT and FF packingMaciej Kurc2021-11-221-1/+5
* Added clustering free LUTs and FFsMaciej Kurc2021-11-221-0/+73
* nexus: Fix DSP macro placementgatecat2021-09-221-32/+32
* Added support for syn_useioff for enabling tri-state control FF integration i...Maciej Kurc2021-09-201-13/+23
* Use correct names for IDDRX1_ODDRX1 FASM featuresMaciej Kurc2021-09-171-17/+3
* Added automatic inference and integration of FFs driving T pin into IOLOGICMaciej Kurc2021-09-171-16/+171
* Added handling of the case when tri-state control net bypasses SIOLOGIC belMaciej Kurc2021-09-171-2/+81
* nexus: Basic packer and FASM support for I/ODDRgatecat2021-07-281-0/+87
* Fixing old emails and names in copyrightsgatecat2021-06-121-1/+1
* Using hashlib in archesgatecat2021-06-021-32/+31
* Use hashlib for core netlist structuresgatecat2021-06-021-40/+40
* nexus: Use new cluster APIgatecat2021-05-061-8/+12
* nexus: Support for hard DPHYgatecat2021-03-081-1/+29
* Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-191-3/+6
* Mark IdString and IdStringList single argument constructors explicit.Keith Rothman2021-02-041-1/+1
* nexus: Implement IdStringList for all arch object namesD. Shah2021-02-021-1/+1
* cleanup: Fix compiler warningsD. Shah2021-01-281-2/+1
* nexus: Add MULTADDSUB9X9WIDE supportDavid Shah2020-12-081-28/+55
* nexus: Add support for initialised LRAMDavid Shah2020-12-071-2/+5
* nexus: Add basic LRAM support (no init)David Shah2020-12-021-2/+55
* nexus: Add PLL supportDavid Shah2020-12-021-2/+74
* nexus: Add support for deriving timing constraints in packerDavid Shah2020-12-021-0/+96
* nexus: Preliminary integration of DSP timing dataDavid Shah2020-11-301-4/+58
* nexus: Clocked MULTADDSUB36X36 fixDavid Shah2020-11-301-0/+2
* nexus: Add MULTADDSUB36X36David Shah2020-11-301-4/+21
* nexus: Add MULTADDSUB18X18 supportDavid Shah2020-11-301-17/+65
* nexus: ACC54 definitionsDavid Shah2020-11-301-0/+32
* nexus: Add DSP pre-adder supportDavid Shah2020-11-301-2/+17
* nexus: Fix DSP signed portsDavid Shah2020-11-301-2/+2
* nexus: Refactor DSP macro splitting to make it more genericDavid Shah2020-11-301-29/+110
* nexus: Add support for clocked MULT9X9sDavid Shah2020-11-301-0/+36
* nexus: Support for unclocked 9x9 multipliesDavid Shah2020-11-301-13/+69
* nexus: More DSP primitive configDavid Shah2020-11-301-0/+16
* nexus: Miscellaneous DSP infrastructureDavid Shah2020-11-301-0/+48
* nexus: Add some infrastructure for DSP packingDavid Shah2020-11-301-5/+135
* nexus: Add EBR timing analysisDavid Shah2020-11-301-0/+19
* nexus: Add LUTRAM and WIDEFN9 timing supportDavid Shah2020-11-301-1/+10
* timing: Add a few more cell typesDavid Shah2020-11-301-1/+9
* nexus: Add cell delay lookupDavid Shah2020-11-301-0/+2
* nexus: Use dedicated Vcc routing for OXIDE_COMB pinsDavid Shah2020-11-301-11/+15
* nexus: Basic support for carriesDavid Shah2020-11-301-0/+96
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