aboutsummaryrefslogtreecommitdiffstats
path: root/nexus
Commit message (Expand)AuthorAgeFilesLines
...
* | nexus: Fix copypastagatecat2021-03-081-1/+1
* | nexus: Fail gracefully when seeing special pinsgatecat2021-03-051-1/+1
|/
* nexus: Fix global handling for LIFCL-17gatecat2021-03-031-1/+1
* nexus: Fix getPipDelay returning negative after refactorgatecat2021-02-231-1/+1
* Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-194-64/+29
* Remove isValidBelForCellgatecat2021-02-162-11/+0
* Merge pull request #575 from YosysHQ/gatecat/belpin-2gatecat2021-02-151-1/+1
|\
| * Start making use of getBelPinsForCellPin APIgatecat2021-02-101-1/+1
* | Add getBelHidden and add some missing "override" statements.Keith Rothman2021-02-111-1/+1
|/
* Add BaseArchRanges for default ArchRanges typesgatecat2021-02-091-16/+1
* Merge pull request #568 from YosysHQ/dave/arch-overridegatecat2021-02-085-303/+106
|\
| * Use 'T' postfix to disambiguate LHS and RHS of usingD. Shah2021-02-081-21/+21
| * Add archArgs and archArgsToId to Arch APID. Shah2021-02-051-2/+3
| * nexus: Switch to BaseArchD. Shah2021-02-055-301/+103
* | Use RelSlice::ssize instead of cast-to-int throughoutD. Shah2021-02-081-10/+10
|/
* Mark IdString and IdStringList single argument constructors explicit.Keith Rothman2021-02-045-16/+16
* nexus: Implement IdStringList for all arch object namesD. Shah2021-02-023-59/+56
* arch: Add getNameDelimiter API for string listsD. Shah2021-02-021-0/+1
* Run "make clangformat".Keith Rothman2021-02-024-27/+21
* Add pybindings for new APIs.Keith Rothman2021-02-022-0/+15
* Rename Partition -> BelBucket.Keith Rothman2021-02-023-29/+29
* Add Partition APIs to ice40, nexus, gowin archs.Keith Rothman2021-02-023-2/+80
* Initial refactoring of placer API.Keith Rothman2021-02-021-0/+5
* Seperate PipRange types in pybindings_shared.Keith Rothman2021-02-012-2/+2
* cleanup: Spelling fixesD. Shah2021-01-281-1/+1
* cleanup: Fix compiler warningsD. Shah2021-01-281-2/+1
* Make RelSlice uncopyableD. Shah2021-01-271-1/+1
* Move RelPtr/RelSlice out of arches into commonD. Shah2021-01-271-39/+1
* nexus: Switch from RelPtr to RelSliceD. Shah2021-01-274-127/+113
* nexus: Add MULTADDSUB9X9WIDE supportDavid Shah2020-12-082-28/+71
* nexus: Fix LRAM pin typesDavid Shah2020-12-072-10/+11
* nexus: Add support for initialised LRAMDavid Shah2020-12-074-12/+50
* nexus: Add basic LRAM support (no init)David Shah2020-12-026-4/+116
* nexus: Add PLL supportDavid Shah2020-12-024-3/+213
* nexus: Add support for deriving timing constraints in packerDavid Shah2020-12-021-0/+96
* nexus/pdc: Parse simple clock constraintsDavid Shah2020-12-021-0/+61
* nexus: Fix db integrity checkDavid Shah2020-11-302-18/+7
* nexus: Add post-place LUTFF optimisationDavid Shah2020-11-304-19/+200
* nexus: Improve error handling in global routerDavid Shah2020-11-301-0/+8
* nexus: Preliminary integration of DSP timing dataDavid Shah2020-11-303-4/+111
* nexus: Tweak heuristics to improve routeabilityDavid Shah2020-11-301-2/+2
* nexus: Clocked MULTADDSUB36X36 fixDavid Shah2020-11-301-0/+2
* nexus: Add MULTADDSUB36X36David Shah2020-11-301-4/+21
* nexus: Add MULTADDSUB18X18 supportDavid Shah2020-11-302-17/+78
* nexus: ACC54 definitionsDavid Shah2020-11-303-0/+77
* nexus: Add DSP pre-adder supportDavid Shah2020-11-302-2/+23
* nexus: Fix DSP signed portsDavid Shah2020-11-301-2/+2
* nexus: Larger DSP tweaksDavid Shah2020-11-302-9/+15
* nexus: Fix slow routing around DSPsDavid Shah2020-11-302-0/+28
* nexus: Fix validity checking when DSPs are usedDavid Shah2020-11-302-3/+10
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 02:54:24 +0000