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# Generic Architecture Example
This contains a simple, artificial, example of the nextpnr generic API.
- simple.py procedurally generates a simple FPGA architecture with IO at the edges,
logic slices in all other tiles, and interconnect only between adjacent tiles
- simple_timing.py annotates cells with timing data (this is a separate script that must be run after packing)
- report.py stores design information after place-and-route to blinky.txt in place
of real bitstream generation
- Run simple.sh to build an example design on the FPGA above
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