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path: root/src/vhdl-demo/Makefile
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PREFIX=../..
BINDIR=${PREFIX}/bin

YOSYS=${BINDIR}/yosys
NEXTPNR=${BINDIR}/nextpnr-ice40
ICEPACK=${BINDIR}/icepack
ICETIME=${BINDIR}/icetime
FLASH=${BINDIR}/flash
GHDL=${BINDIR}/ghdl

BUILDDIR  = ./build
FPGA_TYPE = hx8k
FPGA_PKG  = ct256
PCF       = ice40hx8k-evb.pcf
RMDIR     = rmdir

# Targets
top: $(BUILDDIR)/top.rpt $(BUILDDIR)/top.bin

flash: $(BUILDDIR)/top.bin
	${FLASH} $(BUILDDIR)/top.bin

$(BUILDDIR)/%.json: %.vhd
	@mkdir -p $(@D)
	${YOSYS} -m ghdl -ql $(subst .json,,$@).log -p 'ghdl $< -e ${<:%.vhd=%}; synth_ice40 -abc9 -device u -top top -json $@'

%.asc: %.json
	${NEXTPNR} --${FPGA_TYPE} --package ${FPGA_PKG} --json $< --pcf ${PCF} --asc $@

%.bin: %.asc
	${ICEPACK} $< $@

%.rpt: %.asc
	${ICETIME} -d $(FPGA_TYPE) -mtr $@ $<

all: top

clean:
	rm -f $(BUILDDIR)/*.asc $(BUILDDIR)/*.bin $(BUILDDIR)/*.rpt $(BUILDDIR)/*.log $(BUILDDIR)/*.json
	$(RMDIR) $(BUILDDIR)

# Uncomment this line if you want to keep the intermediate .json and .asc files
# .PRECIOUS: $(BUILDDIR)/%.json %.asc

.PHONY: all prog clean top