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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-11 14:23:45 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-11 14:23:45 -0700 |
| commit | 1ada5681340aca5132e4a7bf8fa2d4a6e80adc59 (patch) | |
| tree | 1915bb60ef2f07e8e92cfb4a7bc48b2974af7135 | |
| parent | 854333f2af53626e09de693f5d5c7fa107d81c74 (diff) | |
| download | yosys-1ada5681340aca5132e4a7bf8fa2d4a6e80adc59.tar.gz yosys-1ada5681340aca5132e4a7bf8fa2d4a6e80adc59.tar.bz2 yosys-1ada5681340aca5132e4a7bf8fa2d4a6e80adc59.zip | |
Revert "$pastQ should be first input"
This reverts commit 8f9d529929f43e6ba98f06159ae9533984c6264f.
| -rw-r--r-- | techlibs/xilinx/abc_xc7.box | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/techlibs/xilinx/abc_xc7.box b/techlibs/xilinx/abc_xc7.box index 5dc93e508..24512ecf7 100644 --- a/techlibs/xilinx/abc_xc7.box +++ b/techlibs/xilinx/abc_xc7.box @@ -62,32 +62,32 @@ RAM128X1D 7 0 17 2 $__ABC_ASYNC 1000 0 2 1 0 764 -# Inputs: $pastQ C CE D R +# Inputs: C CE D R \$pastQ # Outputs: Q FDRE 1001 1 5 1 -0 - 0 0 0 +- 109 -46 358 0 -# Inputs: $pastQ C CE D R +# Inputs: C CE D R \$pastQ # Outputs: Q FDRE_1 1002 1 5 1 -0 - 109 -46 358 +- 109 -46 358 0 -# Inputs: $pastQ C CE CLR D +# Inputs: C CE CLR D \$pastQ # Outputs: Q FDCE 1003 1 5 1 -0 - 109 - -46 +- 109 - -46 0 -# Inputs: $pastQ C CE CLR D +# Inputs: C CE CLR D \$pastQ # Outputs: Q -FDCE_1 1004 1 5 1 -0 - 109 - -46 +FDCE_1004 1 1 5 1 +- 109 - -46 0 -# Inputs: $pastQ C CE D PRE +# Inputs: C CE D PRE \$pastQ # Outputs: Q FDPE 1005 1 5 1 -0 - 109 -46 - +- 109 -46 - 0 -# Inputs: $pastQ C CE D PRE +# Inputs: C CE D PRE \$pastQ # Outputs: Q FDPE_1 1006 1 5 1 -0 - 109 -46 - +- 109 -46 - 0 |