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| author | Clifford Wolf <clifford@clifford.at> | 2016-10-14 13:02:36 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-10-14 13:02:36 +0200 |
| commit | 2ef454c3f579a4b64abcddadf90d3746611d251d (patch) | |
| tree | 19c0166a951a2ef4cae6fba48d7bf94a45f8efa6 | |
| parent | 53655d173b2928328061c8440cc993508e951e1f (diff) | |
| download | yosys-2ef454c3f579a4b64abcddadf90d3746611d251d.tar.gz yosys-2ef454c3f579a4b64abcddadf90d3746611d251d.tar.bz2 yosys-2ef454c3f579a4b64abcddadf90d3746611d251d.zip | |
Added opt_rmdff support for $ff cells
| -rw-r--r-- | passes/opt/opt_rmdff.cc | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/passes/opt/opt_rmdff.cc b/passes/opt/opt_rmdff.cc index 7e87d1adc..922f086f1 100644 --- a/passes/opt/opt_rmdff.cc +++ b/passes/opt/opt_rmdff.cc @@ -72,7 +72,11 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff) RTLIL::SigSpec sig_d, sig_q, sig_c, sig_r; RTLIL::Const val_cp, val_rp, val_rv; - if (dff->type == "$_DFF_N_" || dff->type == "$_DFF_P_") { + if (dff->type == "$_FF_") { + sig_d = dff->getPort("\\D"); + sig_q = dff->getPort("\\Q"); + } + else if (dff->type == "$_DFF_N_" || dff->type == "$_DFF_P_") { sig_d = dff->getPort("\\D"); sig_q = dff->getPort("\\Q"); sig_c = dff->getPort("\\C"); @@ -90,6 +94,10 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff) val_rp = RTLIL::Const(dff->type[7] == 'P', 1); val_rv = RTLIL::Const(dff->type[8] == '1', 1); } + else if (dff->type == "$ff") { + sig_d = dff->getPort("\\D"); + sig_q = dff->getPort("\\Q"); + } else if (dff->type == "$dff") { sig_d = dff->getPort("\\D"); sig_q = dff->getPort("\\Q"); @@ -121,7 +129,7 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff) val_init.bits.push_back(bit.wire == NULL ? bit.data : RTLIL::State::Sx); } - if (dff->type == "$dff" && mux_drivers.has(sig_d)) { + if (dff->type.in("$ff", "$dff") && mux_drivers.has(sig_d)) { std::set<RTLIL::Cell*> muxes; mux_drivers.find(sig_d, muxes); for (auto mux : muxes) { @@ -138,7 +146,7 @@ bool handle_dff(RTLIL::Module *mod, RTLIL::Cell *dff) } } - if (sig_c.is_fully_const() && (!sig_r.size() || !has_init || val_init == val_rv)) { + if (!sig_c.empty() && sig_c.is_fully_const() && (!sig_r.size() || !has_init || val_init == val_rv)) { if (val_rv.bits.size() == 0) val_rv = val_init; mod->connect(sig_q, val_rv); @@ -254,10 +262,10 @@ struct OptRmdffPass : public Pass { if (!design->selected(module, cell)) continue; - if (cell->type.in("$_DFF_N_", "$_DFF_P_", + if (cell->type.in("$_FF_", "$_DFF_N_", "$_DFF_P_", "$_DFF_NN0_", "$_DFF_NN1_", "$_DFF_NP0_", "$_DFF_NP1_", "$_DFF_PN0_", "$_DFF_PN1_", "$_DFF_PP0_", "$_DFF_PP1_", - "$dff", "$adff")) + "$ff", "$dff", "$adff")) dff_list.push_back(cell->name); if (cell->type == "$dlatch") |