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author | Clifford Wolf <clifford@clifford.at> | 2015-04-16 12:09:14 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2015-04-16 12:09:14 +0200 |
commit | 31755ed1cfe4516ddcad30847ed1b2b066bfdf8b (patch) | |
tree | ad9882e77d57959019bd0e0a00de872685305683 | |
parent | dc30b034f74065f5a45badad7b22f4a721ecc16e (diff) | |
download | yosys-31755ed1cfe4516ddcad30847ed1b2b066bfdf8b.tar.gz yosys-31755ed1cfe4516ddcad30847ed1b2b066bfdf8b.tar.bz2 yosys-31755ed1cfe4516ddcad30847ed1b2b066bfdf8b.zip |
Changed ice40 ICESTORM_CARRYCONST port name
-rw-r--r-- | techlibs/ice40/cells_sim.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v index 9c63336d7..def878216 100644 --- a/techlibs/ice40/cells_sim.v +++ b/techlibs/ice40/cells_sim.v @@ -245,9 +245,9 @@ endmodule // Packed IceStorm Logic Cells -module ICESTORM_CARRYCONST (output O); +module ICESTORM_CARRYCONST (output COUT); parameter [0:0] CARRYCONST = 0; - assign O = CARRYCONST; + assign COUT = CARRYCONST; endmodule module ICESTORM_LC ( |