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| author | Andrew Zonenberg <azonenberg@drawersteak.com> | 2016-03-26 14:13:52 -0700 |
|---|---|---|
| committer | Andrew Zonenberg <azonenberg@drawersteak.com> | 2016-03-26 14:13:52 -0700 |
| commit | 31a7567affb7425af1aa27d6dcda4666859ce62f (patch) | |
| tree | 5c1c88c5f6347657e0efb8658759ff91bf48d838 | |
| parent | 44fd3cd149786bc3aaf180af8ec83f790d9cebbe (diff) | |
| download | yosys-31a7567affb7425af1aa27d6dcda4666859ce62f.tar.gz yosys-31a7567affb7425af1aa27d6dcda4666859ce62f.tar.bz2 yosys-31a7567affb7425af1aa27d6dcda4666859ce62f.zip | |
Changed GP_LFOSC parameter configuration
| -rw-r--r-- | techlibs/greenpak4/cells_sim.v | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v index 249ea286c..a4094f06d 100644 --- a/techlibs/greenpak4/cells_sim.v +++ b/techlibs/greenpak4/cells_sim.v @@ -64,8 +64,10 @@ module GP_VSS(output OUT); endmodule module GP_LFOSC(input PWRDN, output reg CLKOUT); + parameter PWRDN_EN = 0; - parameter AUTO_ON = 0; + parameter AUTO_PWRDN = 0; + parameter OUT_DIV = 1; initial CLKOUT = 0; |