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| author | Miodrag Milanovic <mmicko@gmail.com> | 2022-03-18 14:47:35 +0100 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2022-03-18 14:47:35 +0100 |
| commit | 55eed8df574f2aa4d854c2ee74f591a202cbdb83 (patch) | |
| tree | 7baf046dc3f355e33cdaa646664c6b664839fab4 | |
| parent | 0c5279b73da7fcb4d92fc2ddd9d79a2a29254096 (diff) | |
| download | yosys-55eed8df574f2aa4d854c2ee74f591a202cbdb83.tar.gz yosys-55eed8df574f2aa4d854c2ee74f591a202cbdb83.tar.bz2 yosys-55eed8df574f2aa4d854c2ee74f591a202cbdb83.zip | |
More verbose warnings
| -rw-r--r-- | kernel/fstdata.cc | 3 | ||||
| -rw-r--r-- | passes/sat/sim.cc | 12 |
2 files changed, 9 insertions, 6 deletions
diff --git a/kernel/fstdata.cc b/kernel/fstdata.cc index 82f8ff1df..6cf28625c 100644 --- a/kernel/fstdata.cc +++ b/kernel/fstdata.cc @@ -101,7 +101,8 @@ void FstData::extractVarNames() case FST_HT_SCOPE: { snum++; std::string fst_scope_name = fstReaderPushScope(ctx, h->u.scope.name, (void *)(snum)); - scopes.push_back(fst_scope_name); + if (h->u.scope.typ == FST_ST_VCD_MODULE) + scopes.push_back(fst_scope_name); break; } case FST_HT_UPSCOPE: { diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc index 46fe1e23a..f225ebd15 100644 --- a/passes/sat/sim.cc +++ b/passes/sat/sim.cc @@ -809,14 +809,16 @@ struct SimInstance if (item.second==0) continue; // Ignore signals not found Const fst_val = Const::from_string(shared->fst->valueOf(item.second)); Const sim_val = get_state(item.first); - if (sim_val.size()!=fst_val.size()) - log_error("Signal '%s' size is different in gold and gate.\n", log_id(item.first)); + if (sim_val.size()!=fst_val.size()) { + log_warning("Signal '%s.%s' size is different in gold and gate.\n", scope.c_str(), log_id(item.first)); + continue; + } if (shared->sim_mode == SimulationMode::sim) { // No checks performed when using stimulus } else if (shared->sim_mode == SimulationMode::gate && !fst_val.is_fully_def()) { // FST data contains X for(int i=0;i<fst_val.size();i++) { if (fst_val[i]!=State::Sx && fst_val[i]!=sim_val[i]) { - log_warning("Signal '%s' in file %s in simulation %s\n", log_id(item.first), log_signal(fst_val), log_signal(sim_val)); + log_warning("Signal '%s.%s' in file %s in simulation %s\n", scope.c_str(), log_id(item.first), log_signal(fst_val), log_signal(sim_val)); retVal = true; break; } @@ -824,14 +826,14 @@ struct SimInstance } else if (shared->sim_mode == SimulationMode::gold && !sim_val.is_fully_def()) { // sim data contains X for(int i=0;i<sim_val.size();i++) { if (sim_val[i]!=State::Sx && fst_val[i]!=sim_val[i]) { - log_warning("Signal '%s' in file %s in simulation %s\n", log_id(item.first), log_signal(fst_val), log_signal(sim_val)); + log_warning("Signal '%s.%s' in file %s in simulation %s\n", scope.c_str(), log_id(item.first), log_signal(fst_val), log_signal(sim_val)); retVal = true; break; } } } else { if (fst_val!=sim_val) { - log_warning("Signal '%s' in file %s in simulation '%s'\n", log_id(item.first), log_signal(fst_val), log_signal(sim_val)); + log_warning("Signal '%s.%s' in file %s in simulation '%s'\n", scope.c_str(), log_id(item.first), log_signal(fst_val), log_signal(sim_val)); retVal = true; } } |