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| author | Eddie Hung <eddie@fpgeh.com> | 2020-06-03 08:41:55 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-06-03 08:41:55 -0700 |
| commit | 8a11019d382f3eb5a8d95ce64511a1dcbbe2acfe (patch) | |
| tree | 1ccfa0c9c010c41a5f593df545509546a2b9b108 | |
| parent | 00c5ceb1f2c28435fa245a5183d325c441b8e5eb (diff) | |
| download | yosys-8a11019d382f3eb5a8d95ce64511a1dcbbe2acfe.tar.gz yosys-8a11019d382f3eb5a8d95ce64511a1dcbbe2acfe.tar.bz2 yosys-8a11019d382f3eb5a8d95ce64511a1dcbbe2acfe.zip | |
tests: tidy up testcase
| -rw-r--r-- | tests/arch/ecp5/latches_abc9.ys | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/tests/arch/ecp5/latches_abc9.ys b/tests/arch/ecp5/latches_abc9.ys index ca3182254..4daf04050 100644 --- a/tests/arch/ecp5/latches_abc9.ys +++ b/tests/arch/ecp5/latches_abc9.ys @@ -7,9 +7,6 @@ always @* assign q = ~l; endmodule EOT -proc -design -save gold - # Can't run any sort of equivalence check because latches are blown to LUTs synth_ecp5 -abc9 select -assert-count 2 t:LUT4 |