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| author | YRabbit <rabbit@yrabbit.cyou> | 2022-02-23 16:11:47 +1000 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2022-02-24 05:38:33 +0100 |
| commit | 9b3cd4f0d81374a04393ef5d524a3c0603c1b27e (patch) | |
| tree | 2cc97fad0f07a0b61bc965e46006c30e2dd871f3 | |
| parent | a41c1df76f724476136e2668405ccae05494ebb8 (diff) | |
| download | yosys-9b3cd4f0d81374a04393ef5d524a3c0603c1b27e.tar.gz yosys-9b3cd4f0d81374a04393ef5d524a3c0603c1b27e.tar.bz2 yosys-9b3cd4f0d81374a04393ef5d524a3c0603c1b27e.zip | |
gowin: Add support for true differential output
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
| -rw-r--r-- | techlibs/gowin/cells_sim.v | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/techlibs/gowin/cells_sim.v b/techlibs/gowin/cells_sim.v index cc2ad3df5..3f5340b11 100644 --- a/techlibs/gowin/cells_sim.v +++ b/techlibs/gowin/cells_sim.v @@ -570,12 +570,14 @@ module OBUF(output O, input I); assign O = I; endmodule +(* abc9_box *) module TBUF (O, I, OEN); input I, OEN; output O; assign O = OEN ? 1'bz : I; endmodule +(* abc9_box *) module IOBUF (O, IO, I, OEN); input I,OEN; output O; @@ -584,6 +586,15 @@ module IOBUF (O, IO, I, OEN); assign I = IO; endmodule +(* abc9_box *) +module TLVDS_OBUF (I, O, OB); + input I; + output O; + output OB; + assign O = I; + assign OB = ~I; +endmodule + module GSR (input GSRI); wire GSRO = GSRI; endmodule |