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author | Clifford Wolf <clifford@clifford.at> | 2015-06-30 01:37:59 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2015-06-30 01:37:59 +0200 |
commit | caa274ada6f2f35119cff943d0e9ed05dfaaeec7 (patch) | |
tree | 14562590d3f49ce6379d1426d15b130c8668860c | |
parent | df0163cd2b0dfd7c825f13ecb1c22f4f4d494a3b (diff) | |
download | yosys-caa274ada6f2f35119cff943d0e9ed05dfaaeec7.tar.gz yosys-caa274ada6f2f35119cff943d0e9ed05dfaaeec7.tar.bz2 yosys-caa274ada6f2f35119cff943d0e9ed05dfaaeec7.zip |
Added design->rename(module, new_name)
-rw-r--r-- | kernel/rtlil.cc | 7 | ||||
-rw-r--r-- | kernel/rtlil.h | 1 | ||||
-rw-r--r-- | passes/cmds/rename.cc | 4 |
3 files changed, 9 insertions, 3 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 7cd2dd4bb..cc7b1a7b8 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -444,6 +444,13 @@ void RTLIL::Design::remove(RTLIL::Module *module) delete module; } +void RTLIL::Design::rename(RTLIL::Module *module, RTLIL::IdString new_name) +{ + modules_.erase(module->name); + module->name = new_name; + add(module); +} + void RTLIL::Design::sort() { scratchpad.sort(); diff --git a/kernel/rtlil.h b/kernel/rtlil.h index b6248c4c0..854ec1303 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -809,6 +809,7 @@ struct RTLIL::Design void add(RTLIL::Module *module); RTLIL::Module *addModule(RTLIL::IdString name); void remove(RTLIL::Module *module); + void rename(RTLIL::Module *module, RTLIL::IdString new_name); void scratchpad_unset(std::string varname); diff --git a/passes/cmds/rename.cc b/passes/cmds/rename.cc index d16713175..81e532590 100644 --- a/passes/cmds/rename.cc +++ b/passes/cmds/rename.cc @@ -193,9 +193,7 @@ struct RenamePass : public Pass { log_cmd_error("No top module found!\n"); log("Renaming module %s to %s.\n", log_id(module), log_id(new_name)); - design->modules_.erase(module->name); - module->name = new_name; - design->modules_[module->name] = module; + design->rename(module, new_name); } else { |