diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-02 08:20:37 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-02 08:20:37 -0700 |
| commit | f1504696e56030ba5d1f2d7a4b7616695dd8020b (patch) | |
| tree | 106aec07826d4f05ed6922e8fba26e83db573dda | |
| parent | 90382a0f6d1ad7dfd14ced95051e5e76de89491c (diff) | |
| download | yosys-f1504696e56030ba5d1f2d7a4b7616695dd8020b.tar.gz yosys-f1504696e56030ba5d1f2d7a4b7616695dd8020b.tar.bz2 yosys-f1504696e56030ba5d1f2d7a4b7616695dd8020b.zip | |
Use Pass::call_on_module() as per @cliffordwolf comments
| -rw-r--r-- | kernel/yosys.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/kernel/yosys.cc b/kernel/yosys.cc index 456ad48a0..f95c0127b 100644 --- a/kernel/yosys.cc +++ b/kernel/yosys.cc @@ -1299,7 +1299,7 @@ struct ScriptCmdPass : public Pass { if (!c.second.is_fully_const()) log_error("RHS of selected wire %s.%s is not constant.\n", log_id(mod), log_id(w)); auto v = c.second.as_const(); - Pass::call(design, v.decode_string()); + Pass::call_on_module(design, mod, v.decode_string()); } } else if (args.size() < 2) |